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EE Times India - total search 16 articles sort by date sort by relevance

Using the PF_RING for improved lossless packet capturing	2009-10-23
Here's how you can improve lossless network packet capturing with libpcap by using the PF_RING kernel patch.
Radar fundamentals (Part 4)	2011-09-13
Read about Space Time Adaptive Processing, a class of algorithms that provides capabilities beyond that of Doppler radar processing, but has extremely high processing requirements.
Analog, mixed-signal design flow found wanting	2001-06-16
Different views cloud the current analog/mixed-signal design flow issue and should stop concentrating on the problem but find a lasting solution for the industry to further prosper.
Avoiding RTL coding mistakes	2011-10-26
Here's a discussion on RTL coding styles that lead to increased design cycle time and unnecessary complexity during design closure.
How formal MDV can take out IP integration uncertainty	2012-01-25
Find out how the formal metric-driven verification methodology and technologies can eliminate integration uncertainty through the automatic generation of Accellera-defined coverage metrics.
Applying POSIX to real-time systems	2002-03-16
Applying POSIX to real-time systems
Embedded Linux and the Law	2002-11-01
The rising popularity of Linux, combined with perceived cost savings, has spurred many embedded developers to consider a real-time Linux variant as an alternative to a traditional RTOS.
Windows NT And Windows 2000 For Real-Time Applications	2001-07-03
For many reasons, Windows NT, NT Embedded and Windows
HW/SW co-dev't with focus on software	2012-01-13
Here's a discussion on the problems of hardware/software co-development from the point of view of the software designer.
Choosing the right approach for Linux-based USB devices	2003-11-03
Choosing the right approach for Linux-based USB devices
Go beyond LTE requirements, goals	2008-12-26
LTE presents a number of lofty goals, creating challenges for technology and service providers, and equipment manufacturers.
Reusing vital verification knowledge with OVM	2010-01-13
Reuse of legacy-directed test environments is common practice. But with each generation of reuse, the number of tests grows and with it the overhead of maintaining the environment across multiple projects.
Silicon prototyping verifies IP functions	2001-06-01
SoC designers are confronting several important tasks in optimizing next-generation products. New systematic approaches are needed to ensure that IP can be transferred from one process geometry to the next
Fitting last year's IP to today's processes	2001-06-01
Changing design styles in IP reuse should prompt engineers to be more receptive to future design shifts in the industry
Choosing the right design flow model with integrated architecture	2004-02-02
Users of ASIC, COT and COPD models are finding that flows based on an integrated RTL-to-GDSII system can offer additional benefits when fully leveraged.
Extraction method verifies IP functions	2001-06-01
To keep in pace with silicon technology advancement, verification of the reused custom logic against its original counterpart should be considered as an integral part of the reuse process.

---total search 16 articles, total 1 pages, The 1 Page---

EE Times Asia - total search 404 articles

Hardware/software co-dev't with emphasis on software	2012-02-06
Impact of 4Gbps FireWire on industrial apps	2012-01-18
Address 4G issues with SystemVue	2011-12-23
Identifying the 4G PHY architecture design challenges	2011-12-20
Layout software speeds up chip finishing	2011-12-07
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