A New Way To Design ASICs
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2001-03-30 |
| This paper presents a new way to design ASICs that dramatically reduces the cost of ASIC development and greatly decreases the time needed to bring a successful design to market |
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| Choosing the right design flow model with integrated architecture
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2004-02-02 |
| Users of ASIC, COT and COPD models are finding that flows based on an integrated RTL-to-GDSII system can offer additional benefits when fully leveraged |
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| Vendors must support IP reuse in SoC
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2003-04-16 |
| The need for IP reuse will increase as design complexity grows to higher levels. This support structure forms an invisible layer that would make SoC/IP-ASIC engagements as seamless as possible |
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| Bluetooth Enabled ASICs Versus Standard Bluetooth Chipsets
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2001-07-02 |
| This paper discusses the pros and cons of using commercially available Bluetooth chipsets and integrating Bluetooth functionality into an existing ASIC |
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| Analyzing dynamic voltage drop at 90 nm and beyond
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2007-08-06 |
| As VLSI technology scales to 90 nanometres and beyond, ASIC vendors increasingly see power grid integrity issues in their designs and in the field, for two primary reasons |
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| Timing closure: Hybrid optimization to the rescue
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2004-08-16 |
| Hybrid optimization combines ASIC cell-based design flow with transistor-level optimization to achieve improvement in timing closure |
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| Your guide to choosing hardware IP
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2006-02-03 |
| Designing your own chip is hard enough without having to worry about your third-party IP supply. This guide helps ASIC and ASSP designers through the minefield of evaluating and selecting hardware IP for their important projects |
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| Diagnostic test for design validation
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2004-04-16 |
| Whether you are testing a new MCU or an ASIC, post-silicon validation of the design is a must. Here's a look at diagnostic tests and techniques |
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| System specs drive multiprocessor SoC
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2002-02-16 |
| SoC design requires new tools and a different skill set than traditional ASIC chip design. The case study illustrates new challenges and describes methodologies to address them |
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| Towards a more efficient packet processing (Part 1)
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2010-02-09 |
| With the advent of the latest generation of multicore processors, it has become feasible to build complete packet processing applications using general purpose architecture processors, rather than dedicated ASIC and ASSP SoCs |
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| Shift from FPGAs for prototype to ASICs for production
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2011-12-16 |
| The idea of migrating an FPGA design into an ASIC can be overwhelming to a design team, but careful planning can significantly ease the process |
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| 2G design overhaul gives 3G phone
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2009-12-03 |
| Released in Q1 08, Samsung's SGH-J750 is an eye-opener on OEM sourcing decisions, ASIC development strategies and foot-in-the-door approaches behind the cell phone market |
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| Diagnostics for design validation
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2003-04-01 |
| Whether you are testing a new microcontroller or an ASIC, post-silicon design validation is a must. Here's a look at diagnostic tests and techniques |
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| Synthesis route starts with instructions
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2001-05-01 |
| General-purpose instruction processors have dominated computing for a long time. However, the need to customize instruction processors for specific applications is now acute in embedded systems. |
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| Smart toys revel in mobility, speech and control
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2001-02-01 |
| This news article describes the evolution of the conventional toy into enhanced engineering designs which not only offers young children entertainment value, but also expands the possibilities for engineers to design devices useful to the electronics industry. |
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| Process design kits take aim at custom ICs
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2001-04-15 |
| This technical article describes Cadence Design Systems' process design kits for 0.25µm and 0.18µm process simulations. |
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| An in-depth look at ESL
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2011-04-18 |
| Here's a look at the past progression of design entry methods and the fundamental motivations behind the progressions. |
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| FPGA-based Ethernet switch cuts devt time
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2008-04-18 |
| Read about an FPGA-based switch that implements 1588 boundary/transparent clocks. |
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| Wireless Web appliances evolve anew
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2001-04-01 |
| This article describes the common wireless technologies for embedded platforms, such as Cellular Digital Packet Data and General Packet Radio Service, for web appliances. |
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| How to automate stress tests
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2003-12-01 |
| The goal of stress testing is to find system-level interaction problems. Here's a strategy for developing a successful stress-test framework. |
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| HD DVD player pushes the performance envelope
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2007-04-01 |
| When Toshiba set out to develop a second generation of the HD-1A, it was with the intention of reducing cost of the system, not change the features. |
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| Billion-transistor full-custom designs
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2006-09-17 |
| Read about power integrity issues in today's advanced designs and the unique challenges of full-custom designs. |
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| Open source hardware
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2002-12-02 |
| This technical article discusses how open-source techniques in hardware design are still impossible to achieve with the current technology available to engineers. |
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| Take advantage of GPIB capabilities
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2008-11-18 |
| Learn about new extensions of the General Purpose Interface Bus and their inetgration into hardware framework. |
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| Hardware/software integration: Reducing the gap
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2011-03-28 |
| Read about compressing the HW/SW integration gap when using FPGA prototypes. |
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| Complex SoCs breed new design strategies
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2001-03-01 |
| Building effective system-on-chip (SoC) devices are nudging electronic engineers and designers today as they are asked to confront the diverse circuit types that can coexist on a single chip. |
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| The true cost of off-the-shelf analogue ICs
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2011-07-12 |
| Any associated up-front non-recurring engineering costs must be considered along with hard tooling—wafer fabrication masks, test hardware and software and more. |
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| Cut to the core of optimal MPLS router design
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2003-04-16 |
| Cut to the core of optimal MPLS router design |
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| Developing a design methodology for embedded memories
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2001-01-01 |
| Developing a design methodology for |
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| Enable low power design with FPGAs
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2009-10-19 |
| Size and power considerations are often the top priority in many system designs, but portability and long-lasting power can become conflicting design requirements. So what does a design team do? FPGAs are the answer. |
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Strange modes of transport and other "stuff"
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