Simplifying LVDS Backplane Design In 3G Wireless Basestations
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2001-04-03 |
| The increasing demand for bandwidth is driving the communi- |
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| Compensation critical in fitting analog pressure sensors
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2002-02-16 |
| Compensation critical in fitting analog pressure sensors |
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| Managing single event effects in FPGAs, ASICs and processors (Part 1)
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2011-12-28 |
| As dimensions fall below 90 nm, all electronics, including ASICs and FPGAs get affected with single event effects, with faults ranging from logical errors to changes in data to latchups. |
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| Logic suppliers seek ways to embed FPGAs
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2001-03-01 |
| Driven by the convergence of communications, computing and consumer applications, SoC design complexity increases the time required to bring competitive products to market, putting a premium on design speed and flexibility. |
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| Filter banks: Optimisation, synthesis
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2009-02-24 |
| Know how to optimise filter banks using high-level synthesis tools. |
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| Wi-Fi latest in Location free feats
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2007-12-10 |
| It's a media junkie's dream: watch your real-time or time-shifted video with a suitably fast Internet connection whether across the house or across the world. |
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| Mobile net demands optimized design
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2001-02-01 |
| Manufacturers of wireless Internet access systems will play a key role in delivering a new class of wireless services and applications for entertainment, e-commerce and multimedia messaging. |
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| Multichip DRAMs serve graphics apps
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2001-04-15 |
| No technology can last forever. So the question arises: how long can multichip package solutions last in the diverse and rapidly changing graphics market? |
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| Managing multi-Vt, multi-voltage domain timing/temp inversion
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2012-01-05 |
| As we move to 65 nm and below, it is important to choose the libraries corresponding to the lowest temperature PVT because of temperature inversion effects where the delay of the cell actually decreases with increase in temperature. |
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| A critical test of SoC memory strategies
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2004-08-02 |
| A critical test of SoC memory strategies |
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| Integrated approach for emerging tech designs
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2000-12-01 |
| This technology article describes the integration of clock tree synthesis with logic synthesis, placement route and interconnect extraction to maximize the potentials of cell-based designs. |
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| Drive towards scalable, flexible in-vehicle networking
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2008-06-16 |
| FPGAs and full IP solutions give automotive engineers options in optimising their electrical architectures. |
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| Design flip-chip packages with integrated USB 3.0
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2011-05-23 |
| Learn about the use of IE3D to design a four-layer package that has a USB 3.0 interface. |
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| Overcome design complexities in multi-core networking (Part 1)
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2009-09-30 |
| The explosion of IP-based applications and services heralds in a convergence of telecommunications and IT towards IP architectures, leading to major challenges. |
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| Extraction method verifies IP functions
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2001-06-01 |
| To keep in pace with silicon technology advancement, verification of the reused custom logic against its original counterpart should be considered as an integral part of the reuse process. |
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| Prevent FPGA cloning
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2009-04-20 |
| Here's a new way of tagging designs to help to counter the fast growing trade in IP and cloned designs. |
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| Select the right FPGA debug method
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2009-04-16 |
| Know the benefits and drawbacks of different methods for debugging and validating FPGA designs. |
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| iPod Nano clone offers some extras
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2009-03-16 |
| Unravel the maze of confusing supply-chain players found in Esolo MP4, a second-gen iPod Nano clone. |
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| Maximise high-speed signal integrity, Part 3
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2009-04-02 |
| Know the things to look for when shopping for electronics and ICs to address signal integrity and signal equalisation. |
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| Using FPGAs to interface with digital comm protocols
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2008-12-04 |
| Here's a tutorial on FPGA-based implementation of custom or proprietary digital protocols. |
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| Designing cost-effective 3D using SoC
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2011-08-09 |
| Learn why SoCs are touted to be a key component in the universal 3D market. |
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| Packet switching right choice for wireless
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2001-02-01 |
| The Internet switching model can cost two orders of magnitude less than conventional circuit architectures, making the economics of an IP network very attractive. |
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| Is gesture recognition leading the way to 3D UIs?
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2012-02-09 |
| Know the issues surrounding gesture recognition in 3D interaction and the techniques to overcome them. |
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| Do we really need Agile hardware development?
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2011-10-27 |
| Here's an article that tackles whether the values and principles that guide agile software teams should similarly guide SoC teams. |
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| How to achieve fast timing closure on FPGA designs
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2006-03-01 |
| The increased effects of routing on FPGA path timing requires EDA tools that completely understand the physical properties of the target device and can analyse designs during the placement process in order to achieve timing closure. |
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| Power-Sensitive Design Techniques On FPGA Devices
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2001-07-03 |
| Power-Sensitive Design Techniques On FPGA Devices |
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| Ringed bus technology puts twist on switching networks
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2000-12-01 |
| Switch-fabric technology has existed for many years in mainstream applications embedded at the core of the network, such as ATM and Ethernet, in the form of proprietary ASICs designed by networking equipment vendors. . |
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| Improve accuracy in current measurements
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2004-12-16 |
| POWER |
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| Power management issues for computer peripherals
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2011-12-26 |
| Learn about the challenges of managing multiple rails, their timing, sequencing, and dynamic/transient modes. |
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| Fuji's FinePix undergoes postmortem
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2008-01-14 |
| As digital camera platforms stabilise, more- robust mechanical design and environmental resistance may be the most significant opportunities for differentiation. |
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Strange modes of transport and other "stuff"
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