Build more efficient stepper motor control subsystem
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2010-11-22 |
| Find out how to simplify implementation of multiple motor controls by integrating a digital control core with the driver IC. |
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| Silicon prototyping verifies IP functions
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2001-06-01 |
| SoC designers are confronting several important tasks in optimizing next-generation products. New systematic approaches are needed to ensure that IP can be transferred from one process geometry to the next. |
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Designing with printed non-volatile ferro-electric memories
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2011-07-25 |
| Here's a look at memories based on a reversible ferro-electric capacitor structure, and their application to novel products and markets. |
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Automated video algorithm implementation
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2006-06-02 |
| The article presents an overview of a C-based design flow that enables designers to generate high-quality hardware for video algorithms. A video line filter example is used to illustrate techniques for coding video algorithms. |
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Design considerations of a power management system in mobile phone handsets
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2004-02-02 |
| This technical feature discusses the challenges designers face as mobile handsets become crammed with sophisticated and complex features. |
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Hitting the 10Gbps backplane mark
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2004-07-01 |
| To reach the 10Gb backplane plateau, designers need Serdes that can accommodate dynamic environmental conditions. |
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Physical design flow taps partition layout
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2004-08-02 |
| This article describes a new hierarchical design flow and its usage on a 3 million-gate chip. |
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Platform FPGAs enable network processing
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2004-11-01 |
| Enhanced FPGA features provide a powerful platform for building revenue-generating routers and switches. |
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High-speed packet service kick-starts migration to 3G
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2004-10-18 |
| Peak rates of up to 7Mbps and compatibility with legacy networks make HSDPA a good first step toward 3G cellular. |
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Learn how FPGA pares costs in digital displays
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2005-06-16 |
| To maximize savings provided by a platform-based approach, system electronic components must be carefully selected |
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Attending to signal integrity in complex designs
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2001-10-01 |
| This technical design article focuses on the signal integrity tools required to enhance the facilitation of IC design and processing. |
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Module approach ups 5GHz WLAN front-end integration
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2004-06-16 |
| This article describes a single-package 5GHz WLAN RF module comprising a BiCMOS IC, commercial GaAs PA and Tx/Rx switch, high-quality integrated RF filters and a patch antenna. |
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Current sensing for energy metering
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2002-06-16 |
| This technical article discusses how a digital integrator can be used to condition a signal output from a Rogowski coil current sensor to an appropriate level for high-current energy meter applications. |
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EDA platform benchmark: The desktop FPGA design flow
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2001-01-01 |
| This article evaluates the system requirements of your desktop against typical FPGA designs you would encounter. |
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Subtract software costs by adding CPUs
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2005-05-01 |
| The best way to get a project done on time is to break it into smaller, more manageable chunks. That theory works better than some programmers suspect, extending even into multi-processing systems. Jack Ganssle shows how breaking one big program into smaller programs that each run on their own processor can work wonders on performance, schedules, and sanity. |
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Solving problems early on using co-verification
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2004-11-16 |
| Learn the importance and benefits of hardware and software co-verification before the physical design becomes available. |
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Synthesize SoCs using C-based design flow
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2001-08-01 |
| This is a case study in which an SoC was synthesized for Columns Ltd using a C-based design flow. |
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Power MOSFETs for smaller dc-dc converters
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2005-01-17 |
| Developing power MOSFETs mounted in dc-dc converters minimizes power constraints as the speed of CPUs and memory installed in PCs and servers continue to integrate more sophisticated functions. |
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Design Trends and EDA Tools: China & Taiwan
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2005-10-03 |
| IC and PCB design engineers in China and Taiwan reveal the current level of design and share development experience with EDA tools |
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Leakage power at 90nm and below
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2005-06-01 |
| Learn more about the challenges and tools needed in addressing leakage power at 90nm and below in today's advanced designs |
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DACs with FPGAs for direct-IF architectures
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2004-02-16 |
| FPGAs allow partitioning from the DAC for flexible pre-processing, making the resulting system more adaptable. |
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Embedded processors for programmable logic
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2002-04-08 |
| This article describes soft processor cores for PLDs as well as the process of embedding high-performance hard macro processors into PLDs. |
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| Address SI issues in high-speed board design
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2007-03-16 |
| This article discusses some of the SI challenges and the factors associated with high-speed interface designs that are enabled with key features of a RapidIO switch. |
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| Library generators employ optical correction at cell level
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2001-03-01 |
| This technology article discusses the enhancement of cell-based designs with the evolution of EDA. |
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Practical DFT leads to highly testable ASICs
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2001-06-01 |
| Combine classic design-for-test methodologies, such as scan and BIST, with practical DFT, to clear the path to a highly testable design |
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Advancing to true HW/SW co-verification
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2001-11-16 |
| This technical article discusses how advancing to true HW/SW co-verification can enhance embedded systems designs as manufacturers go into deeper submicron processes. |
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New devices needed for speed crunch
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2003-08-01 |
| The question for today's communications system designers is how to manage this new set of data-aggregation, segregation and prioritization issues as they attempt to build the data flow management mechanisms needed to optimize throughput. |
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FPGA co-processors optimize car infotainment, telematics
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2004-11-01 |
| As entertainment electronics becomes a primary source of differentiation among luxury vehicles, carmakers can rev up their designs with FPGA co-processing. |
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Interface logic technology will never die
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2003-07-16 |
| Logic continues to have a bright future and it will always be regarded as the stop-gap solution when advanced ASICs or FPGAs fail to provide the best performance-to-cost ratio. |
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System integration technologies support SoC design
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2001-05-08 |
| System integration is a critical bottleneck in the development of system-on-a-chip technologies. |
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