Power-Sensitive Design Techniques On FPGA Devices
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2001-07-03 |
| This paper focuses on the design techniques that need to be considered for power saving when considering FPGA devices |
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| How to choose the right FPGA
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2007-01-18 |
| This article highlights some of the latest FPGAs and analyzes their specific features and tradeoffs to aid engineers in selecting the most appropriate FPGA for their application needs |
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| FPGA-based designs call for better noise immunity
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2009-10-08 |
| Today's FPGA-based designs require improved clocking with greater immunity to power supply switching noise observed in real-world applications |
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| Understand FPGA/PCB co-design process
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2009-01-15 |
| The key in FPGA/PCB co-design is to consider connectivity as the foundation of the design process and implementation |
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| Achieve your design goal with FPGA synthesis tools
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2009-12-07 |
| Following sound design flow practices can help FPGA designers manage their projects effectively. Here's how FPGA synthesis tools can help you efficiently achieve your design goals |
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| Moving part of an algorithm into an FPGA co-processor
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2010-04-08 |
| This article discusses the general issues of moving part, or all, of a DSP industrial application onto an FPGA using system software design tools |
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| Employ FPGA to accelerate medical imaging process
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2011-09-01 |
| Know how to use an FPGA platform and a high level synthesis tool called Impulse C to accelerate a statistical line of reaction estimation for a high-resolution PET scanner |
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| Tackle team-based FPGA design
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2006-03-02 |
| Now that FPGA chips are large and all-encompassing it makes sense that they're no longer solo development efforts. This expert from Lattice Semiconductor describes how teams of developers can work on one FPGA cooperatively |
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| Improve accuracy with MS FPGA calibration
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2009-03-18 |
| Read about mixed-signal FPGAs capable of supporting a calibration scheme without the use of external components. |
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| FPGA-based Ethernet switch cuts devt time
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2008-04-18 |
| Read about an FPGA-based switch that implements 1588 boundary/transparent clocks |
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| Improve FPGA-based ASIC prototyping
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2009-01-13 |
| Know how to overcome the challenge of connecting all the logic blocks both within an FPGA and across multiple FPGA devices |
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| FPGA-to-ASIC integration provides flexibility in auto MCUs
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2006-12-08 |
| The primary benefit of using MCUs has been high level system integration combined with relatively low cost. However, there are hidden costs associated with these devices well beyond the unit price. |
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| Designing with high-performance FPGA
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2008-11-04 |
| Read about optimal packaging solutions for preserving power and signal integrity in FPGAs. |
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| Power-Sensitive Design Techniques On FPGA Devices
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2001-07-03 |
| Power-Sensitive Design Techniques On FPGA Devices |
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| Overcome FPGA I/O pin assignment challenges
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2009-03-13 |
| Remove the pain from the pinout process with a mix of smart I/O planning and new tools. |
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| AC motor control: DSP, MCU or FPGA
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2009-05-13 |
| Here's a comparison of DSPs, MCUs, and mixed-signal FPGAs for building efficient AC motor control systems. |
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| Improve SI in high density FPGA-based designs
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2008-12-29 |
| Know how to generate a Verilog test code, and detect assembly and fabrication-related faults. |
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| C-Language for FPGA acceleration of embedded software
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2006-03-31 |
| Learn how computationally intensive algorithms can be written, analysed, and optimised for increased performance in FPGAs. |
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| FPGA Mezzanine card enables I/O design flexibility
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2009-11-17 |
| Today's embedded system designers continue to rely on FPGAs to perform the increasingly critical role of external I/O interface for their systems. |
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| Testing FPGA and FPGA-based board interconnections
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2008-08-12 |
| This article describes a simple, effective and generic solution to check signal connectivity between FPGAs on a high-density prototyping board with multiple FPGAs and hundreds of signals. |
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| C-Language for FPGA acceleration of embedded software
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2006-03-31 |
| Learn how computationally intensive algorithms can be written, analysed, and optimised for increased performance in FPGAs. |
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| Implement PCIe on FPGA with interface wrapper
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2009-04-14 |
| Here are some approaches to help pinpoint the best implementation solution for an application. |
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| FPGA clock schemes
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2003-03-02 |
| One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently |
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| FPGA design from the outside in
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2004-10-03 |
| FPGAs enable everyone to be a chip designer. This instalment shows how to design the bus interface for a generic peripheral chip. |
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| Emulation wins over FPGA prototyping
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2008-01-16 |
| System-level verification solutions require the power of emulation to address the opposing forces of increasing complexity and shrinking design schedules. |
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| Implement low-power 65nm FPGA designs
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2007-04-18 |
| This article explores the benefits of reduced power consumption. It also illustrates the many process and architectural innovations implemented in Virtex-5 devices. |
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| Achieve 533MHz FPGA memory data rates
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2009-09-09 |
| This article examines the architecture behind the I/O blocks in high-end FPGAs and how these FPGAs are able to achieve 533MHz or 1,067Mbit/s data rates. |
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| Select the right FPGA debug method
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2009-04-16 |
| Know the benefits and drawbacks of different methods for debugging and validating FPGA designs |
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| FPGA on-chip debug with off-chip benefits
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2003-02-17 |
| This article will address some of the limitations of on-chip debug and show users an alternative that combines the best of both worlds--on-chip debug with off-chip, deep sample storage. |
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| Improving productivity with FPGA design reuse
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2000-12-01 |
| This technical article describes the most effective way to fill the productivity gap in silicon integration. |
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