HDL - EE Times-India

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EE Times India - total search 22 articles sort by date sort by relevance

Complex designs demand greater attention to data management	2001-03-01
Complex designs generate huge amounts of data. A data-centric methodology addresses the data management challenge by employing a design-centric rather than a tool-centric methodology.
The basics of constructing FPGA	2008-01-01
A sound knowledge of the FPGA development process enables technical leads, supervisors, managers, or systems engineers interface with FPGA designers more efficiently.
Formal verification for IP soft core	2003-11-17
Engineers are facing challenges on improving design efficiency and shortening time-to-market of IP soft core--formal verification is believed to provide a new solution for them.
ALF language lets designers control libraries	2004-05-17
Without ALF, EDA tools could not overcome the deficiencies by proprietary, tool-specific and fragmentary library extensions.
One approach for debugging of modified designs	2001-03-01
Two engineers describe a methodology of comparing old designs to new designs in order to validate the new one.
Equivalence checking for SoC blocks	2001-11-16
This technical article explains that as custom blocks become increasingly important for SoCs, equivalence checking between transistor-level implementation and behavioral modeling become equally significant design factors.
Vector generation for structural testers	2004-12-01
Sizing of modern ASICs and SoCs requires an array of vectors for comprehensive testing to achieve the required quality levels.

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Embedded Design India - total search 11 articles

Simulation debugging using triple speed Ethernet testbench	2009-12-18
Unifying hardware, software verification	2009-03-05
Embedding 1-Wire Master into ASIC	2008-12-22
Using the embedded JTAG ACE player	2008-11-10
Back to the language roots	2005-01-02
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Power Design India - total search 1 articles

Power-Sensitive Design Techniques On FPGA Devices	2001-07-03
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EE Times Asia - total search 286 articles

64bit simulator handles larger designs	2010-01-22
FPGA-based dev't board eases prototyping	2009-09-23
Altera, Peking U open joint EDA/SOPC Lab	2009-08-17
Tool suite speeds up multiprocessor apps design	2009-06-22
65nm FPGAs, clock ICs defy downturn	2009-02-26
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