Design practices for high-quality portable audio
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2007-06-16 |
| This technical paper guides engineers in good practices for system design and PCB layout relevant to portable systems that include audio playback and/or recording |
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| Mastering signal integrity fundamentals
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2001-12-16 |
| The author shows why a solid foundation in signal integrity issues and analysis is a must for IC- and PCB-design engineers. The article describes the necessary learning required |
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| Design Trends and EDA Tools: China & Taiwan
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2005-10-03 |
| IC and PCB design engineers in China and Taiwan reveal the current level of design and share development experience with EDA tools |
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| Charge pumps in battery-powered devices
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2005-03-01 |
| Regulated charge pumps offer good solutions for driving LEDs and are easy to implement on a PCB |
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| Moving active components inside the board
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2006-07-03 |
| Shrinking PCB real estate has spurred research into embedding electronic components within the board. Tom Adams describes the work of a consortium led by the Fraunhofer Institute |
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| Techniques for handling electromagnetic interference
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2001-01-01 |
| This technology article focuses on the primary steps that engineers can take at the PCB level to control common-mode radiated EMI |
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| Design Trends and EDA Tools: Asia-Pacific
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2006-10-18 |
| Over 300 system, IC and PCB design engineers across the Asia-Pacific, including China, Taiwan, South Korea, Singapore, Malaysia and India, participate in the annual survey to reveal the level of design activity and share development experience with EDA tools |
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| Improve transient immunity in MCU-based embedded design (4)
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2006-12-04 |
| This article is part of a tutorial series on how to improve transient immunity in microcontroller-based embedded design. It focuses on PCB power supply and floorplanning |
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| Trends, challenges in systems design
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2005-06-16 |
| Basic system-design methodologies are changing to enable the parallel design of the FPGA and PCB for optimum system cost, performance and cycle time |
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| Use time-domain methods to measure crosstalk
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2007-11-16 |
| This article discusses the elements of crosstalk, and demonstrates how you can measure crosstalk on a single-layer PCB using an oscilloscope or a signal analyser |
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| Eliminating EMI protection components (1)
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2007-12-31 |
| This article focuses on the use of the faraday cage or "picket fence" approach to PCB design and layout to eliminate costly EMI protection components |
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| Thinking about an x-ray system?
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2004-02-02 |
| Know the twelve important questions before purchasing an x-ray inspection system for your PCB designs |
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| Support IP with topology routing
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2008-04-16 |
| This is the second of a two-part article that follows the capture of Intellectual Property (IP) by the design engineer. It focuses on the PCB designer collaboration of the IP through the remaining design flow |
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| Improve audio performance in portable designs
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2008-05-01 |
| This article provides suggestions for a good system design and PCB layout practices relevant to the design of any portable system that includes audio playback and/or recording functionality |
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| Protel upgrades P-CAD package
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2001-04-15 |
| This article describe the enhancements in Protel's P-CAD line of products, which includes schematic capture, signal-integrity analysis, library management and PCB placement |
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| Board tools unite for enhancements
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2001-06-01 |
| Leading EDA companies bare their design enhancements for existing PCB design products |
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| Making RF cellular design simple
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2005-11-01 |
| The challenge in RF handsets is to consume less PCB space as more features are embedded without sacrificing performance |
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| Evaluating schematic capture solutions
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2008-03-19 |
| Vikas Kohli, senior architect at Cadence, reviews challenges faced by PCB design engineers and examines the requirements placed on EDA tools |
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| Addressing the issues of high-performance FETs (Part 2)
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2010-08-09 |
| Package impedance, PCB layout, interconnect parasitic and switching speed are all critical factors influencing a MOSFET's performance in a power-supply circuit. This article addresses the common questions about today's high-performance FETs and discusses how to apply them |
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| Preparing boards for assembly
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2008-11-11 |
| Read about the different processes a PCB goes though before arriving at an assembly line |
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| Using reference designs in implementing low, high frequency ADCs
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2010-04-08 |
| Designers of digital systems are familiar with implementing the "leftovers" of their digital design by using FPGAs and CPLDs to glue together various processors, memories and standard function components on their PCB |
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| Breaking the CAM bottleneck
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2001-10-16 |
| This technical article describe open-road techniques for streamlining the front-end PCB process to remove CAM bottleneck issues |
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| Analyse simultaneous switching noise in PCBs
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2007-12-16 |
| This article offers a systematic simultaneous switching noise (SSN) overview with the focus on the noise caused by FPGA output buffers. The authors offer several PCB design tips for minimising noise |
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| SuperHyway provides SoC backbone
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2000-12-01 |
| Recent technology improvements have made it cost-effective to integrate components previously connected on a PCB onto a single piece of silicon. These so-called system-on-a-chip (SoC) devices generally comprise most of the blocks commonly found on a computer motherboard plus some application-specific intellectual property (IP). This means design issues that were formerly the province of systems designers are now within the realm of the chip architect. As a result, interconnection schemes common at the system and network level, such as packet switching, must now be considered at the SoC level |
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| Employ fencing for best EMI protection
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2008-07-15 |
| Use the Faraday cage approach for PCB design and layout to eliminate costly EMI protection components |
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| Reclocking for restoring low-jitter HD digital video
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2008-09-22 |
| Learn how to restore integrity to a HD digital video signal after passing through a cable or through PCB traces |
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| Cadence, Agere tool would foster IC co-design
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2001-05-01 |
| This article describes the Cadence and Agere team-up to develop a tool with chip I/O planning capabilities. |
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| Avoid compliance test failure
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2008-07-24 |
| This article discusses the most common system design issues that cause products to fail the HDMI Compliance Test. |
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| Speed design capture using spreadsheets for interconnects
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2008-07-01 |
| Cadence senior architect Vikas Kohli discusses how you can enhance a standard spreadsheet approach to create a powerful design entry solution that can handle designs with large pin counts. |
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| System designer's view of display interface, power-saving problems
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2011-12-23 |
| Display-processor interface mismatches, system battery life extension, and integration of a pico projector are the three common problems faced by system designers. |
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Strange modes of transport and other "stuff"
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