| Techniques for using latches
|
2011-08-15 |
| Learn about the advantages and disadvantages of latches over flip flops. |
|
Employing clock gating in ASIC, FPGA designs
|
2010-06-16 |
| Clock gating is a well-understood power optimisation technique employed in both ASIC and FPGA designs to eliminate unnecessary switching activity. |
|
| Exploring the types of combinational loops
|
2010-03-18 |
| This technical article explores the various types of combinational loops and the effects they can have on a design. |
|
| Use Multi-Vt to cut leakage power in embedded SoC
|
2011-08-16 |
| Here's a multi-threshold voltage flow technique that does not require embedded SoC architecture changes. |
|
| Post-silicon validation methodology for DSPs
|
2008-11-11 |
| Read about post-silicon validation that is carried out on the first fabricated ICs with a true system built around it. |
|
| Performing high-level synthesis
|
2010-03-11 |
| It is vitally important to verify the design before performing high-level synthesis, not after. It is not effective to synthesise a design that does not work. |
|
| Managing power in programmable SoC
|
2011-07-25 |
| Here are some low power concepts associated with shutting down power to blocks in a chip. |
|
| Employ combined prototyping solutions to solve hardware/software integration issues
|
2012-02-08 |
| Maximise the individual advantages of prototypes in combination with other prototyping techniques. |
|
| Implementing Virtual Line Crossing Detection
|
2010-07-20 |
| This article describes the implementation of Virtual Line Crossing Detection (VLCD) on an Altera Stratix II FPGA and the methodology we used. |
|
| Speed up processor verification with testbench infrastructure reuse
|
2011-09-01 |
| Specialised processor verification IP can free engineers from historical development and maintenance commitments. This liberated time and energy can then allow a renewed focus on verification quality and turnaround times. |
|
| Logic suppliers seek ways to embed FPGAs
|
2001-03-01 |
| Driven by the convergence of communications, computing and consumer applications, SoC design complexity increases the time required to bring competitive products to market, putting a premium on design speed and flexibility. |
|
| Questions for SystemC
|
2001-05-16 |
| OSCI is supposed to be an "open" and independent standards effort, but Synopsys still has total control over the license agreement. |
|
| Scheduling sporadic events in real-time systems
|
2003-10-01 |
| Scheduling sporadic events in real-time systems |
|
| Introduction to low-power
|
2008-09-10 |
| As power starts to replace performance as the key competitive aspect of SoC design, new methodologies are emerging based on the CPF standard. |
|
| Software verification, debug in the MPSoC era
|
2007-06-12 |
| A new breed of programming and debug solutions is required to help programmers with the specific software verification challenges in MPSoC. |
|
| Optimizing ASIC design flow for SoPCs
|
2001-05-01 |
| System-on-programmable-chip (SoPC) technology has characteristics of both board-based design and ASIC-based system-on-a-chip ASIC design. The immediate attraction of SoPC is that, like a breadboard, the design can be up and running very quickly. |
|
| Optimizing ASIC design flow for SoPCs
|
2001-05-01 |
| System-on-programmable-chip technology has characteristics of both board-based design and ASIC-based SoC design. The immediate attraction of SoPC is that the design can be up and running very quickly. |
|
| Of ARM Mali-T604 and the future IP trends
|
2011-07-12 |
| The ARM Mali graphics core has made a shift from years of evolution in the rendering hardware. It now points to the future of IP. |
|
| Real system-level design challenge: Hardware-firmware integration
|
2001-06-16 |
| For today's engineering co-design, the real system challenge is the hardware/firmware integration. |
|
| Shift from FPGAs for prototype to ASICs for production
|
2011-12-16 |
| The idea of migrating an FPGA design into an ASIC can be overwhelming to a design team, but careful planning can significantly ease the process. |
|
| Introduction to low-power
|
2008-09-10 |
| As power starts to replace performance as the key competitive aspect of SoC design, new methodologies are emerging based on the CPF standard. |
|
| Power-Sensitive Design Techniques On FPGA Devices
|
2001-07-03 |
| Power-Sensitive Design Techniques On FPGA Devices |
|
| How formal MDV can take out IP integration uncertainty
|
2012-01-25 |
| Find out how the formal metric-driven verification methodology and technologies can eliminate integration uncertainty through the automatic generation of Accellera-defined coverage metrics. |
|
| Flow is shaky for programmable SoCs
|
2001-03-01 |
| Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust. |
|
| Optimising software using TLM virtual platform
|
2011-12-07 |
| Find out how transaction level modelling 2.0 was used to produce an executable system model and, subsequently, execute software to analyse functional aspects contributing to overall system level performance. |
|
| Behavioural design for low-power silicon
|
2009-03-05 |
| Know how to use high level synthesis to reduce power consumption and improve other aspects of circuit quality. |
|
| Discovering the ideal multi-processing tile
|
2011-09-06 |
| Read about a project launched to identify a promising multi-processor "tile" that could act as a building block for many-core designers. |
|
| Trade-offs of multi-gigabit data link aggregation
|
2011-10-17 |
| Learn about the need for aggregated links in leading-edge systems, and some implementation trade-offs. |
|
| More prototyping tips
|
2003-09-16 |
| More prototyping tips |
|
| Make way for HLS adoption
|
2010-04-21 |
| By increasing their usability, applicability and quality of results (QoR), high-level synthesis (HLS) solutions are proving that they can fulfil their initial promise. |
|
Strange modes of transport and other "stuff"
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment