DBIST answers advanced SoC test challenges
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2003-04-16 |
| Due to the exponential growth in the time and cost to apply scan tests on sophisticated SoCs, Synopsys Inc. releases its DBIST as a key capability in its new product for advanced SoC testing, the DFT Compiler SoCBIST |
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| Use Multi-Vt to cut leakage power in embedded SoC
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2011-08-16 |
| Here's a multi-threshold voltage flow technique that does not require embedded SoC architecture changes |
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Towards cost-effective SoC-based network appliances
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2010-05-31 |
| Developing a family of SoCs with slightly varying features with a common embedded base allows embedded designers and OEMs a quick and cost-effective path to diversifying their applications very effectively. |
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How to use UML in your SoC hardware/software design (2
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2006-07-24 |
| Following an introduction to an executable UML in part 1, this article describes its elements and how to ensure that they are translatable into multiple hardware and software uses. |
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Multi-threaded design tackles SoC performance bottlenecks (2
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2006-12-27 |
| This article presents the advantages of using multi-threading processors in SoC designs to address bottlenecks, particularly in QoS, processor efficiency, and control |
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How to use UML in your SoC hardware/software design (2
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2006-07-24 |
| Following an introduction to an executable UML in part 1, this article describes its elements and how to ensure that they are translatable into multiple hardware and software uses. |
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H-Bridges provide 'smart power' for automotive SoC applications: Challenges and concepts
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2008-02-21 |
| From electric motor controllers to Class D amplifiers, efficient mixed-signal integration is vital in design, and saving energy and cost. |
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Managing power in programmable SoC
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2011-07-25 |
| Here are some low power concepts associated with shutting down power to blocks in a chip. |
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Using UML for SoC hardware/software design
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2006-07-21 |
| This article presents the central problem of SoC design and also proposes an xtUML solution |
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H-Bridges provide 'smart power' for automotive SoC applications: Challenges and concepts
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2008-02-21 |
| From electric motor controllers to Class D amplifiers, efficient mixed-signal integration is vital in design, and saving energy and cost. |
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Minimize SoC leakage with power mgmt tools
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2011-07-05 |
| A new power domain partitioning technique could reduce leakage in system-on-chip designs by taking advantage of package configuration information. |
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A critical test of SoC memory strategies
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2004-08-02 |
| A critical test of SoC memory strategies |
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System awareness enhances SoC power management
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2011-04-11 |
| Learn how power management tactics within a SOC interact with the bigger system-level functions |
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| SuperHyway provides SoC backbone
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2000-12-01 |
| A step ahead of CompactPCI, Compact Packet Switching Backplane (cPSB) is emerging as a viable solution for interconnect problems. |
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Using UML for SoC hardware/software design
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2006-07-21 |
| This article presents the central problem of SoC design and also proposes an xtUML solution |
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Will 2010 be multi-core SoC's year
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2010-04-15 |
| It's time for software to step up—no more sitting on the sidelines. It's time to adapt and embrace the multi-core hardware options available. |
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SoC offers active dynamic motor control feedback
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2008-01-04 |
| Single chip provides position sensing performance and robustness for high-volume, cost-sensitive automotive applications. |
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Development tools key to SoC implementation
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2010-08-04 |
| Customers need chips, tools and software that match the specific needs of their application. |
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OCP SoC instrumentation solutions go beyond trace
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2007-11-04 |
| Rapid analysis at the systems level helps get your applications to market quickly. |
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PoP, SiP, MCM, MCP or SoC: Weighing the trade-offs
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0021-05-28 |
| This article evaluates the trade-offs between package-on-package, system-in-package, multi-chip packages and multi-chip modules in an embedded/mobile design. |
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Embedding Flash memory in SoC applications
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2001-11-01 |
| Drawing on three years of their own research, the authors explain the advantages of nonvolatile memory architecture for large, embedded-memory applications. |
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Power distribution for deep-submicron SoC designs
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2001-05-01 |
| Power grid verification is becoming an imperative in deep-submicron design. |
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PoP, SiP, MCM, MCP or SoC: Assessing the trade-offs
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2006-12-15 |
| This article evaluates the trade-offs between package-on-package, system-in-package, multi-chip packages and multi-chip modules in an embedded and mobile design. |
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Testing SoC interconnects using boundary scan
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2004-08-02 |
| Delay violations occurring in the interconnects of high-speed SoCs can be tested using JTAG boundary scan architecture. |
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SoC-based MCU bus design in high bandwidth embedded apps
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2005-01-17 |
| A number of alternative approaches based on on-chip serial interconnects similar to serial fabrics, crossbar switches and packet-based busses are being researched. |
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System integration technologies support SoC design
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2001-05-08 |
| System integration is a critical bottleneck in the development of system-on-a-chip technologies. |
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Using power regression testing for SoC design
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2008-02-19 |
| Explore the concept of regression testing as it applies to the increasingly important problem of power and learn about a methodology for power regression testing. |
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SoC-based design of handheld medical devices
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2009-06-18 |
| Know why many developers are turning to SoC architectures to reduce design cycle time, component count and product cost in medical applications |
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Equivalence checking for SoC blocks
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2001-11-16 |
| This technical article explains that as custom blocks become increasingly important for SoCs, equivalence checking between transistor-level implementation and behavioral modeling become equally significant design factors. |
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Self-repair boosts memory SoC yields
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2002-04-01 |
| This technical article describes the emergence of a new BIST and repair technology that is capable of running test, diagnostics and repair functions right on the chip. |
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