DFT, DFM tests assure quality SoC design
|
2005-08-16 |
| Learn the importance of design-for-manufacturability and design-for-test in ramping up advanced products in deep-submicron technologies |
|
| Self-repair boosts memory SoC yields
|
2002-04-01 |
| This technical article describes the emergence of a new BIST and repair technology that is capable of running test, diagnostics and repair functions right on the chip. |
|
| Complex SoC testing with a core-based DFT technique
|
2008-02-26 |
| Know how to overcome the challenges of high power consumption and huge data volume generated during testing. |
|
| System integration technologies support SoC design
|
2001-05-08 |
| System integration is a critical bottleneck in the development of system-on-a-chip technologies. |
|
| Selecting a CPU core for multi-CPU SoC designs
|
2003-03-03 |
| This article examines the many features of processor cores being considered for multi-CPU designs. |
|
| Equivalence checking for SoC blocks
|
2001-11-16 |
| This technical article explains that as custom blocks become increasingly important for SoCs, equivalence checking between transistor-level implementation and behavioral modeling become equally significant design factors. |
|
| Testing SoC interconnects using boundary scan
|
2004-08-02 |
| Delay violations occurring in the interconnects of high-speed SoCs can be tested using JTAG boundary scan architecture. |
|
| Next-gen DSL: SoC doubles the data rates
|
2005-01-17 |
| The promise of an even broader broadband reach rests on the shoulders of two new DSL implementations--ADSL2+ and READSL. |
|
| H-Bridges provide 'smart power' for automotive SoC applications: Architectures and circuit protection
|
2008-02-26 |
| From electric motor controllers to Class D amplifiers, efficient mixed-signal integration is vital in design, and saving energy and cost. |
|
| Logic suppliers seek ways to embed FPGAs
|
2001-03-01 |
| Driven by the convergence of communications, computing and consumer applications, SoC design complexity increases the time required to bring competitive products to market, putting a premium on design speed and flexibility |
|
| Early power analysis with CPF
|
2008-10-31 |
| Learn how PowerTheater can utilise CPF most efficiently to help users develop power-efficient SoC designs |
|
| Few-chip packaging: An MCM renaissance
|
2001-08-01 |
| Kevin Rinebold explains how FCP is a more attractive risk management strategy than SoC for combining IP from multiple sources or mixed semiconductor technology |
|
| Synthesize SoCs using C-based design flow
|
2001-08-01 |
| This is a case study in which an SoC was synthesized for Columns Ltd using a C-based design flow |
|
| Power Integrity and Energy Aware Floor Planning
|
2008-01-29 |
| Extreme performance and frequency are no longer dominant design goals for SoC's. Recent years have witnessed changes in microprocessors' architectures, with multi-GHz unicore CPU devices abandoned in favour of low-frequency multi-core variants, and frequency becoming a forgotten memory |
|
| Flow is shaky for programmable SoCs
|
2001-03-01 |
| Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust |
|
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment