Introduction to low-power
|
2008-09-10 |
| As power starts to replace performance as the key competitive aspect of SoC design, new methodologies are emerging based on the CPF standard |
|
| Grasp SystemVerilog testbench debug, analysis
|
2008-10-16 |
| The task of chip verification is becoming ever so complex as silicon shrinks and SoC designs grow larger. SystemVerilog addresses this challenge by serving as a platform for enabling advanced methodologies and automation |
|
| Taking GALS to 65nm designs
|
2004-11-16 |
| Emerging globally asynchronous, locally synchronous SoC design architectures offer a powerful way to solve interconnect issues in these superintegrated chips |
|
| Extracting value from integrating power management
|
2006-12-20 |
| As System-on-Chips (SoC) provide more to the system in terms of the level of integration, performance and battery-life, integration of power management into the SoC becomes a necessity in the industry |
|
| System-level multicore debugging made easy
|
2005-08-01 |
| Virtual system prototypes outdo traditional ISS models in multicore SoC designs |
|
| Signal integrity issues rise with 500Mbps rates
|
2004-09-01 |
| SoC designs with data transfer rates beyond 500Mbps fall in a gap between traditional design methods and the proposed chip-package-virtual board co-design method |
|
| Oki, Lexra roll out prototyping boards for SoCs
|
2001-04-15 |
| This article discusses Oki Semiconductor and Lexra Inc.'s board products intended to speed time-to-silicon for complex SoC designs |
|
| Embedded flash enables 'smart' auto interface apps
|
2006-10-04 |
| This article outlines the arguments for the use of embedded flash towards fully integrated SoC design, saving space and costs, especially for automotive interface applications |
|
| Taiwan's design foundries thriving despite downturn
|
2001-06-16 |
| A design house merely designs an IC; a design foundry provides total solutions from embedded IPs to complex tasks of time-to-market SoC design, production and testing services |
|
| Complex SoCs breed new design strategies
|
2001-03-01 |
| Building effective system-on-chip (SoC) devices are nudging electronic engineers and designers today as they are asked to confront the diverse circuit types that can coexist on a single chip |
|
| Power integrity, energy aware floor planning
|
2008-01-29 |
| The article shows how different challenges may be effectively addressed in SoC floor planning |
|
| Optimizing IP integration
|
2010-08-12 |
| A fundamental shift has occurred in SoC design. This shift has largely gone unnoticed and has introduced significant unnecessary costs and inefficiencies into the design process |
|
| Curb power issues, enhance system performance
|
2005-12-16 |
| Solving power challenges of wireless mobile devices must start with process technologies and move upward to hardware, SoC and software |
|
| Accelerated Encryption Using A Configurable Processor Core
|
2001-07-03 |
| This paper presents an abstract that covers SoC methodology to enhance and accelerate encryption using a configurable processor architecture designed for embedded applications |
|
| Flow is shaky for programmable SoCs
|
2001-03-01 |
| Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust |
|
| DFT confronts test cost in design run
|
2002-04-16 |
| This technical article offers a synopsis of the challenges in SoC design, particularly with regard to test costs |
|
| Transaction-based method supports co-verification
|
2004-04-01 |
| This paper describes how engineers doing SoC verification can be more efficient by using a single, reconfigurable verification system, applications and a unified methodology |
|
| Plato unwraps router for huge systems-on-chip
|
2001-06-01 |
| This technology news article describe the Plato Design System's SoC routing device to eliminate capacity bottlenecks |
|
| Universal controller ties fate to emulation
|
2002-07-01 |
| SoC design service providers are tapping the flexibility of emulation techniques to enhance chip verification and test |
|
| Introduction to low-power
|
2008-09-10 |
| As power starts to replace performance as the key competitive aspect of SoC design, new methodologies are emerging based on the CPF standard |
|
| Deep signal and design integrity assured in SoCs
|
2000-12-01 |
| This technology news article describes the issues related to SoC designs and the corresponding solution to each |
|
| Do we really need Agile hardware development?
|
2011-10-27 |
| Here's an article that tackles whether the values and principles that guide agile software teams should similarly guide SoC teams |
|
| Cut yield fallout by preventing over and under at-speed testing
|
2011-10-14 |
| Learn how to overcome the problems associated with SoC at-speed testing such as over-testing and under-testing to boost yield |
|
| Finding that elusive bug
|
2010-11-29 |
| Read about the challenge of detecting and correcting the elusive functional defects that unavoidably arise in the design of complex SoC devices |
|
| Wireless RF integration: Today and tomorrow
|
2004-03-01 |
| As industries move toward SoC integration, designers will find ways to meet the demands for greater RF complexity and extended battery life |
|
| Optimizing ASIC design flow for SoPCs
|
2001-05-01 |
| System-on-programmable-chip technology has characteristics of both board-based design and ASIC-based SoC design. The immediate attraction of SoPC is that the design can be up and running very quickly |
|
| LSI technology for designing LCD-TV-DVD components
|
2004-04-22 |
| This paper explains Toshiba's SoC strategy, and introduces Toshiba's latest LCD-TV and DVD player technology, as well as LCD-TV-DVD component stereo reference solution |
|
| Advanced simulation eases UWB RFIC design flow (1)
|
2005-12-21 |
| Designing an MB-OFDM UWB radio is easier for SoC designers when high-performance circuit simulation is combined with reliable electromagnetic extraction in a single RF design |
|
| Simulate embedded hardware acceleration
|
2007-04-18 |
| The HES system provides solutions for the different verification stages, including hardware acceleration simulation, SoC HW/SW acceleration co-verification and hardware prototype verification |
|
| Reducing IC design time with advanced emulation
|
2002-06-01 |
| Learn an innovative way to reduce IC design time by using an advanced processor with complete SoC capabilities |
|
Strange modes of transport and other "stuff"
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment