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EE Times India - total search 162 articles sort by date sort by relevance
HD DVD player pushes the performance envelope 2007-04-01
When Toshiba set out to develop a second generation of the HD-1A, it was with the intention of reducing cost of the system, not change the features.  
Functional TLM simplifies multiprocessor software development 2005-12-16
Start developing, integrating and testing software code long before silicon is available with functional transaction-level modeling.  
Unified methodology enables full-chip test 2005-12-16
The article will discuss shortcomings of today's test flows and propose a unified methodology for implementing full-chip test.  
The advantage of using logic BIST for ASIC designs 2000-12-01
This technical paper reveals the advantage of using logic BIST for ASIC designs.  
Smart partitioning could be path to integration 2002-09-16
The paper talks about the trade-offs of implementing RF inside the chip against surrounding the mainly digital chip with the needed RF circuits.  
Developing IA solutions 2002-04-08
This article describes the essential criteria necessary for the development of information appliances.  
Use timing-accurate system-level models 2007-03-28
A virtual system prototype provides a software simulation-based model of the electronic system that allows design teams to improve design productivity, reduce time-to-market and decrease risk.  
Verification reuse ensures predictable design 2002-07-16
Find out ways to make verification efforts reusable using the National Semiconductor Geode GX2 system so that integration stages become predictable instead of schedule black holes.  
Solving problems early on using co-verification 2004-11-16
Learn the importance and benefits of hardware and software co-verification before the physical design becomes available.  
UMA technology beckons fixed-mobile convergence 2006-08-14
The Unlicensed Mobile Access technology enables roaming and handover between cellular networks and unlicensed wireless networks. Philips Semiconductors explains how you can achieve fixed-mobile convergence.  
QIP metric streamlines reuse 2006-02-16
The process of evaluating and integrating IP to maximize benefits of reuse is as important as the decision to reuse.  
Reconfigurable computing accelerates network device verification 2001-02-01
This technical paper describes the use of reconfigurable computing (RCC) coprocessor technology and its attendant software to speed the verification of a large networking device.  
ESL enables software-driven SoCs 2005-07-18
This article provides detailed information on electronic system-level design and why it is popular among technology leaders  
Co-design methodology for system interconnect 2004-05-17
This article outlines a co-design methodology supported by a unique platform that enables design and analysis of the electronic system interconnect from IC to IC, across packages, connectors, backplanes and PCBs.  
Attending to signal integrity in complex designs 2001-10-01
This technical design article focuses on the signal integrity tools required to enhance the facilitation of IC design and processing.  


 
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