MCUs enable auto technology convergence: Fault detection
|
2008-10-23 |
| Read about how automotive MCU convergence results into more faults, and how to detect and supervise these faults. |
|
| Technology trends in flash MCUs
|
2009-05-08 |
| Read about the previous technology trends and the new requirements of the next generations of this technology. |
|
| New thinking needed amid runaway test costs
|
2001-04-15 |
| There is a need to achieve test-cost reductions that rival the reductions in wafer fabrication costs to ensure continued growth of semiconductor markets. ATE should not wait for someone else to do it. |
|
| Startup set to roll Bluetooth module-on-a-chip
|
2001-04-01 |
| A CMOS device said to pack nearly all the components needed to build a Bluetooth module has been launched by a year-old Silicon Valley startup. |
|
| Adding games, graphics on handsets
|
2005-03-16 |
| The passion in Asia for graphic-rich on-the-move gaming is set to stimulate a huge demand for next-generation mobile phones. |
|
| Smart partitioning could be path to integration
|
2002-09-16 |
| The paper talks about the trade-offs of implementing RF inside the chip against surrounding the mainly digital chip with the needed RF circuits. |
|
| COT design flow validates SoCs
|
2002-05-01 |
| This technical article details the approach two chip companies used to validate a COT (customer-owned tool) flow from beginning to end resulting in a complete working silicon. |
|
| SystemVerilog enhances assertion-based verification
|
2005-06-16 |
| ABV leverages designer knowledge and automatic verification methods to stress-test the design before tape-out. Find out how |
|
| Rapid design of media-enabled information appliances
|
2001-01-01 |
| An integration platform approach can greatly facilitate the rapid development of new products, as well as successors and derivatives. The article takes a look at the design of an information appliance that may spawn many derivatives. |
|
| Solving problems early on using co-verification
|
2004-11-16 |
| Learn the importance and benefits of hardware and software co-verification before the physical design becomes available. |
|
| Multimedia needs multiprocessor SoCs
|
2004-05-17 |
| Cellphones are becoming handheld entertainment centers that simultaneously operate as sophisticated wide-pipe wireless telephones. |
|
| Attending to signal integrity in complex designs
|
2001-10-01 |
| This technical design article focuses on the signal integrity tools required to enhance the facilitation of IC design and processing. |
|
| Use timing-accurate system-level models
|
2007-03-28 |
| A virtual system prototype provides a software simulation-based model of the electronic system that allows design teams to improve design productivity, reduce time-to-market and decrease risk. |
|
| Diagnostic test for design validation
|
2004-04-16 |
| Whether you are testing a new MCU or an ASIC, post-silicon validation of the design is a must. Here's a look at diagnostic tests and techniques. |
|
| Verification issues for reconfigurable IP
|
2005-03-01 |
| To improve reusability, IP providers are developing clever ways to configure IP and enable semicustom IP blocks while reducing the potential to break the code |
|
| QIP metric streamlines reuse
|
2006-02-16 |
| The process of evaluating and integrating IP to maximize benefits of reuse is as important as the decision to reuse. |
|
| Unified methodology enables full-chip test
|
2005-12-16 |
| The article will discuss shortcomings of today's test flows and propose a unified methodology for implementing full-chip test. |
|
| Hopper hierarchical flow: Improvements for large ICs
|
2001-09-16 |
| This technical article describes the Hopper software hierarchical flow implemented to maximize large, high-performance IC design. |
|
| Library generators employ optical correction at cell level
|
2001-03-01 |
| This technology article discusses the enhancement of cell-based designs with the evolution of EDA. |
|
| Articulating hierarchical design for SoCs
|
2002-01-01 |
| The unified flow for complex designs, complete with hierarchical design capabilities, is an intuitively pleasing proposition. |
|
| Making RF cellular design simple
|
2005-11-01 |
| The challenge in RF handsets is to consume less PCB space as more features are embedded without sacrificing performance |
|
| Application engine synthesis offers new design approach
|
2005-06-01 |
| Application engines have become critical functionality enablers in SoCs for complex consumer devices |
|
| Functional TLM simplifies multiprocessor software development
|
2005-12-16 |
| Start developing, integrating and testing software code long before silicon is available with functional transaction-level modeling. |
|
| Implementing audio codecs in configurable processors
|
2006-08-14 |
| You can implement audio codecs in hard-wired logic, on general-purpose microprocessors, on DSPs, or on configurable microprocessors. Tensilica compares the approaches for system developers implementing the codecs in SoCs. |
|
| Network Processing In Cost Sensitive Applications
|
2001-07-02 |
| This paper provides an abstract that explains the need for flexibility of CPU-based solutions due to the commoditization and consumerization of a new breed of network devices. |
|
| The advantage of using logic BIST for ASIC designs
|
2000-12-01 |
| This technical paper reveals the advantage of using logic BIST for ASIC designs. |
|
| Extend peripheral set of embedded processors
|
2004-12-01 |
| System designers define and integrate peripheral subsystems without writing HDL using the SOPC Builder tool. |
|
| Verification reuse ensures predictable design
|
2002-07-16 |
| Find out ways to make verification efforts reusable using the National Semiconductor Geode GX2 system so that integration stages become predictable instead of schedule black holes. |
|
| Co-design methodology for system interconnect
|
2004-05-17 |
| This article outlines a co-design methodology supported by a unique platform that enables design and analysis of the electronic system interconnect from IC to IC, across packages, connectors, backplanes and PCBs. |
|
| Separate vs. integrated smart-phone components
|
2005-06-01 |
| Only by weighing the trade-offs can a designer arrive at the best possible wireless-appliance solution for a specific design requirement |
|
Strange modes of transport and other "stuff"
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment