Accelerating verification closure for complex SoCs, IPs
|
2008-10-24 |
| The complexity of today's SoCs creates the need for advanced verification methods that go beyond simulation-based approaches |
|
| Simplifying DSP-based electro-hydraulic servo actuator designs
|
2006-08-14 |
| This article introduces the electro-hydraulic servo system and how you can design it properly with simulation modelling tools |
|
| Simulate embedded hardware acceleration
|
2007-04-18 |
| The HES system provides solutions for the different verification stages, including hardware acceleration simulation, SoC HW/SW acceleration co-verification and hardware prototype verification |
|
| Berkeley spin-off to spread use of Ptolemy tools
|
2001-06-16 |
| Enhancements are on their way for Agile Design Inc.'s Ptolemy hierarchical simulation tools to boost engineering designs |
|
| Simplifying DSP-based electro-hydraulic servo actuator designs (2)
|
2006-08-14 |
| Designing hydraulic systems are made easier with simulation modelling tools. This piece shows you how |
|
| Use timing-accurate system-level models
|
2007-03-28 |
| A virtual system prototype provides a software simulation-based model of the electronic system that allows design teams to improve design productivity, reduce time-to-market and decrease risk |
|
| Test system simulates and validates ECMs
|
2003-05-16 |
| VI Engineering provided the services for a major automotive supplier that wanted them to specify and develop a test system for simulation and design validation of the company's ECMs |
|
| Co-verification speeded up for design
|
2001-06-16 |
| Innoveda's boosted V-CPU hardware/software co-verification system through a link with Axis Systems' simulation accelerator can increase the performance of hardware portions of the co-verification process |
|
| Analogue behavioural models reduce LSI verification time
|
2008-08-14 |
| Selective use of analogue behavioural models instead of SPICE elements can greatly speed up simulation |
|
| Power mode technologies verify today's SoCs
|
2008-02-27 |
| Five technologies – PDML specification, power-aware simulation, structural power checks, power-related assertions, and formal analysis of the power-control logic – provide outstanding checking and coverage while saving half of the power verification time |
|
| Analyzing high-speed serial links
|
2004-12-01 |
| Learn a new simulation/statistical technique that accurately analyzes Serdes performance in systems, delivering 3Gbps data rates and beyond |
|
| Simplifying PLL Design
|
2008-02-12 |
| New techniques in PLL design promise to shorten simulation runtime without sacrificing accuracy |
|
| Speed enhancements for Model Tech upgrades
|
2001-04-15 |
| This article discusses the ModelSim simulation upgrade, which promises faster performance, better memory use, new interactive debug features and improved testbench and regression test support |
|
| Design next-gen analogue/RF circuits with last-gen tools
|
2008-11-19 |
| Read about last-generation circuit and RF simulation tools used to design next-generation analogue/RF circuits |
|
| Move from code-based to model driven software testing (3)
|
2007-12-04 |
| This article explains how to convert simulation scripts into model driven test cases |
|
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment