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EE Times India - total search 124 articles sort by date sort by relevance
Peripheral model makes dual run 2001-03-01
With complex embedded-system designs exceeding 1 million gates, verification has become the critical bottleneck in the design process.  
Back to the basics: The art of algorithm implementation 2005-10-11
The article discusses how a common interface performing interactive algorithm design decreases inefficiencies and provides a single programming platform to design, prototype and deploy intelligent devices.  
Simulating high-speed disk drive signals 2003-05-16
People around the world make  
Flow is shaky for programmable SoCs 2001-03-01
Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust.  
Open source hardware 2002-12-02
This technical article discusses how open-source techniques in hardware design are still impossible to achieve with the current technology available to engineers.  
Verification IP reuse for complex networking ASICs 2008-09-18
Here is a verification environment that lays down the methodology blueprint for future ASIC verification projects and stretches the boundary of IP reuse.  
Windows NT And Windows 2000 For Real-Time Applications 2001-07-03
For many reasons, Windows NT, NT Embedded and Windows  
Post-silicon validation methodology for DSPs 2008-11-11
Read about post-silicon validation that is carried out on the first fabricated ICs with a true system built around it.  
Moving beyond advanced design geometries 2008-08-01
Design verification will play a major role in reducing design cost and improving new product yields and product platforms.  
Optimizing ASIC design flow for SoPCs 2001-05-01
System-on-programmable-chip technology has characteristics of both board-based design and ASIC-based SoC design. The immediate attraction of SoPC is that the design can be up and running very quickly.  
Developing a design methodology for embedded memories 2001-01-01
Developing a design methodology for  
Interactions in modelling a capacitor-bypass network 2007-10-15
Bypass capacitors may not have the glam of ICs, but they are vital to proper circuit performance. Understand how to properly model and apply them.  
RF SiP technology moves to wireless design mainstream(2) 2006-08-28
This article discusses how an ideal RF SiP flow must manage, replicate, and control post-layout simulations.  
RF Basics: Radio Propagation 2007-12-10
This article discusses the mechanisms of radio wave propagation and the use of Maxwell?s equations as the basis for solving various RF design issues.  
C-Language for FPGA acceleration of embedded software 2006-03-31
Learn how computationally intensive algorithms can be written, analysed, and optimised for increased performance in FPGAs.  


 
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