C-Language for FPGA acceleration of embedded software
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2006-03-31 |
| Learn how computationally intensive algorithms can be written, analysed, and optimised for increased performance in FPGAs. |
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| Extraction method verifies IP functions
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2001-06-01 |
| To keep in pace with silicon technology advancement, verification of the reused custom logic against its original counterpart should be considered as an integral part of the reuse process. |
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| Startup preps 5Gbps backplane transceiver
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2001-06-16 |
| In a bid to build a better bit pipe on the backplane, Accelerant Networks is preparing to roll out a proprietary CMOS transceiver that harnesses multilevel signaling technology. |
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| Building prototype user interfaces on a PC
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2003-09-01 |
| Building prototype user interfaces on a PC |
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| Verification firm starts partners program
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2001-04-15 |
| Seeking deeper integrations with third-party EDA tools, Verisity Design Inc. announced its Verisity Interoperability Partners (VIP) program. This technical article discusses that program and its effect to the EDA industry. |
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| Modelling for accurate Serdes design
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2007-12-16 |
| This paper describes an algorithmic modelling methodology that gives you flexibility in modelling your serial I/O device accurately while providing you with all the IP protection you need. |
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| Optimizing DSPs for wireless world
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2001-04-15 |
| Complexities in next-generation requirements is taxing the capabilities of traditional DSP technology and design methodologies, causing a need for industry business models to be drastically redefined. |
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| Moving active components inside the board
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2006-07-03 |
| Shrinking PCB real estate has spurred research into embedding electronic components within the board. Tom Adams describes the work of a consortium led by the Fraunhofer Institute. |
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| Embedded test complicates SoC realm
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2001-03-01 |
| SoC devices today implement a variety of specialized microelectronic functions. Those functions, sometimes with embedded systems, typically comprise of hardware or software design objects. |
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| Syntax raises RTL abstraction level
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2001-05-16 |
| A University of Toronto professor has proposed a new RTL abstraction syntax that he claimed can be implemented by a modest extension to traditional imperative programming languages. |
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| Oki, Lexra roll out prototyping boards for SoCs
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2001-04-15 |
| This article discusses Oki Semiconductor and Lexra Inc.'s board products intended to speed time-to-silicon for complex SoC designs. |
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| Polar modulation in mobile PA design
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2004-02-02 |
| POWER |
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| Specifying DDR requirements with PCB routing tools
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2006-09-25 |
| Alternative methods for specifying high-speed timing requirements have advantages over traditional methods as shown in this guideline for PCB design. |
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| The basics of constructing FPGA
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2008-01-01 |
| A sound knowledge of the FPGA development process enables technical leads, supervisors, managers, or systems engineers interface with FPGA designers more efficiently. |
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| Improve SSTA library characterisation
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2009-03-16 |
| Read about the need for a better method of doing cell characterisation for SSTA that significantly reduces runtime. |
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