Home | Login | Register Now   [Mar 15,2010]
Global Sources
EE Times-India
Search results: simulation EE Times-India Home / Search results
Use EE Times-India online search engine to quickly find technical articles, product news, current industry trends and application notes to aid your design projects and enhance your market edge.
Search within these results   Submit Query
EE Times India - total search 124 articles sort by date sort by relevance
Using PCB routing tools in DDR and hi-speed timing requirements 2006-09-24
The article discusses a new approach in specifying DDR and high-speed timing requirements by using printed circuit board routing rules.  
Emulation solves verification challenge 2007-12-16
Sun Microsystems shares experiences of latest generation hardware-based verification systems used to develop its recently launched Ultrasparc T2 processor.  
Design concerns of hybrid/fuel cell electronics 2004-07-16
POWER  
More prototyping tips 2003-09-16
More prototyping tips  
Technique probes deep-submicron test 2000-12-01
This technology news article describes the latest Agilent Technology technique for conducting deep-submicron test schemes.  
ASIC generation revamped for IP reuse 2001-06-01
ASIC generation revamped for IP reuse  
Emulation or prototyping for silicon success? 2001-04-15
With the high-stakes financial and time-to-market risks involved in designing ICs, which verification method is necessary for first-pass silicon success?  
Analog, mixed-signal design flow found wanting 2001-06-16
Different views cloud the current analog/mixed-signal design flow issue and should stop concentrating on the problem but find a lasting solution for the industry to further prosper.  
Verification challenges of embedded memory devices 2006-08-14
This article discusses the verification challenges faced by embedded memory designers as the technology moves towards integration.  
Validating netlist reduction, circuit extraction 2010-01-15
A review of the existing techniques as well as a merciless way to doubtlessly validate netlist reduction and circuit extraction are presented in this technical article.  
Using cost-effective Zigbee 2008-02-16
The explosive growth expected in device connection is being driven by the emergence of new open standards like IEEE 802.15.4 and Zigbee,and cost plays an important role in system viability. This article discusses a low-cost way of implementing wireless functionality.  
Using S-parameter data effectively 2006-03-27
This article discusses the use of S-parameter measurements in the RF design process.  
Assertion methodologies for Verilog design 2002-01-16
This article describes the different approaches designers need to undertake in dealing with assertion methodologies for hardware designs expressed in Verilog or VHDL.  
Design and verification with Cadence's Virtuoso AMS Designer 2005-06-01
This article explains the different 'use model' requirements for the simulator to accommodate its users, the mixed-signal system architect, the model developer, the analog and digital design engineers and the verification engineer  
Lower costs through design tool performance 2005-03-16
The ISE software has capabilities that reduce design and verification times, attaining design closure faster  

Embedded Design India - total search 47 articles
Addressing memory mapping issues in co-processing 2010-03-01
The benefits of virtualised systems development 2010-02-19
Simulation debugging using triple speed Ethernet testbench 2009-12-18
Microchip's op amp Spice macro models 2009-12-10
3D EM simulation assists dynamic system analysis 2009-09-23
--- more results---
Power Design India - total search 30 articles
Estimating junction temperature by top surface temperature in power MOSFETs 2010-03-02
Designing power isolation filters with ferrite beads for Altera FPGAs 2009-12-29
Stability in high-speed linear LDO regulators 2009-12-09
UniFET—optimised switch for discontinuous current mode power factor correction 2009-11-03
Component calculations and simulation tools for FAN2106 2009-10-15
--- more results---
EE Times Asia - total search 1578 articles
IMEC, Synopsys join hands on 3D stacked ICs 2010-03-11
Circuit optimization tool tailored for analog/RF 2010-03-10
IPL Alliance launches iPDK open standard 2010-03-05
Magma, Chengdu ICC open joint IC design lab 2010-03-04
Addressing IC reliability issues (Part 1) 2010-02-26
--- more results---

Embedded Design
• China's DTV standard revolutionises broadcast
• Using LTE on FPGAs
• PCIe multicast: Purposes, advantages
• Filter banks: Optimisation, synthesis
• Trends in open source for consumer electronics
more...
Power Design
• Build an intelligent solar tracking system with FPGAs
• "Pump and dump" with a capacitor bank
• Prevent hacking, tampering in energy meters
• Efficiently driving LEDs offline
• Micro-stepping eases step motors' operations
more...
 
Go to top         Connect on Facebook        Follow us on Twitter        Follow us on Orkut