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EE Times India - total search 169 articles sort by date sort by relevance
Hierarchical physical design for million-gate ASICs 2001-04-15
Raw design size in million-gated ASICs can cripple physical design and timing closure and the viable solution is physical hierarchy.  
Delivering a full-chip hierarchical circuit simulation 2003-02-03
Since many nanometer problems are related to the dynamic circuit reponse, detailed full-chip circuit simulation should become the most effective way to resolve problems in SoC, memory and mixed-signal designs.  
Building a Bluetooth test system 2003-11-03
Having a test plan improves test times, which in turn translates into customer satisfaction.  
Diagnostics for design validation 2003-04-01
Whether you are testing a new microcontroller or an ASIC, post-silicon design validation is a must. Here's a look at diagnostic tests and techniques.  


 
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