Identification chips bring fingerprint verification a step further
|
2006-04-05 |
| A new fingerprint identification chip takes ID verification technology to the next level |
|
| Design with Verification: Not an Oxymoron
|
2007-11-05 |
| In SoC development, the relatively new concept and practice of design with verification promises multiple benefits |
|
| An integrated approach to PCI verification in SoCs
|
2001-11-01 |
| This article looks at the device verification strategy and implementation of a typical PCI subsystem design in order to improve SoC designs |
|
| Address verification issues with scalable methods
|
2007-04-10 |
| This article examines how scalable verification, design for verification, and strategies that include abstraction, assertion-based techniques, and improved debugging methods address the fundamental challenges facing design teams |
|
| SystemVerilog reference verification methodology: VMM adoption
|
2006-09-04 |
| The article is the last instalment of a four-part paper about a reference verification methodology that meets the goals for both RTL and system-level verification |
|
| Complex SoCs power intent verification
|
2009-05-15 |
| Know the basic elements of low power verification and how a technology enables power-aware verification at the RTL level |
|
| Multi-language verification for multi-site projects, Part 2
|
2008-04-12 |
| Read about powerful verification solutions and other issues that may be encountered while designing a solution |
|
| Formal verification for IP soft core
|
2003-11-17 |
| Engineers are facing challenges on improving design efficiency and shortening time-to-market of IP soft core--formal verification is believed to provide a new solution for them |
|
| Mixed-signal simulation in design, verification
|
2005-07-01 |
| Find out how the Virtuoso AMS Designer solution simulates mixed-signal chips throughout design and verification |
|
| Transaction-based method supports co-verification
|
2004-04-01 |
| This paper describes how engineers doing SoC verification can be more efficient by using a single, reconfigurable verification system, applications and a unified methodology |
|
| Quality verification and validation
|
2002-06-01 |
| Know the fundamental theory and techniques of verification and validation, and see how they have been successfully applied in the creation of high quality embedded software |
|
| Accelerating verification closure for complex SoCs, IPs
|
2008-10-24 |
| The complexity of today's SoCs creates the need for advanced verification methods that go beyond simulation-based approaches |
|
| SystemVerilog enhances assertion-based verification
|
2005-06-16 |
| ABV leverages designer knowledge and automatic verification methods to stress-test the design before tape-out. Find out how |
|
| Verification tool speeds complex IC out the door weeks ahead of schedule
|
2002-02-01 |
| This technical article discusses speeding up design and verification of complex ICs without sacrificing quality to beat competition |
|
| Automated formal verification for OCP-based IP Cores
|
2008-01-21 |
| The article discusses the automation of Formal Verification for bus protocols like OCP |
|
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment