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EE Times India - total search 265 articles sort by date sort by relevance
Understand verification coverage with formal analysis 2011-05-02
Know how formal coverage can be used to evaluate constraints and proofs.  
Unifying hardware, software verification 2009-03-05
Explore the need for a unified platform for both hardware and embedded software development.  
Use processor-driven tests for functional verification 2006-10-04
This article discusses processor driven test bench methods in detail and presents their strengths and weaknesses. It examines the inherent value of combining PDT with traditional HDL test benches.  
Automate formal verification for OCP 2008-07-15
This article discusses the automation of FV for bus protocols like Open Core Protocol (OCP).  
Design and verification strategies for complex systems (2 2006-06-19
Virtual system prototypes can result in better products, shorter development times, and lower development costs.  
Reusing vital verification knowledge with OVM 2010-01-13
Reuse of legacy-directed test environments is common practice. But with each generation of reuse, the number of tests grows and with it the overhead of maintaining the environment across multiple projects.  
Verification and validation 2001-06-01
Every product has defects. Finding them as early in the development process as possible is definitely something to strive for.  
Design and verification with Cadence's Virtuoso AMS Designer 2005-06-01
This article explains the different 'use model' requirements for the simulator to accommodate its users, the mixed-signal system architect, the model developer, the analog and digital design engineers and the verification engineer  
Software verification for non-safety critical embedded designs 2009-04-06
Know how non-safety critical systems can also benefit from the standards in aerospace and automotive industries.  
Ultrasparc III passes physical verification 2002-09-16
Sun Microsystem's new processor succeeds in its quest to make optimal use of the die area and power budget to achieve highest performance.  
Spectrum analysis key to speed up 3G verification 2003-10-01
Time-to-market, competitiveness and market share are important considerations on the increasingly aggressive 3G market.  
Analysis tools speed up design debug, verification 2005-09-01
Learn about developments in logic analyzers that open up new dimensions in speed and performance  
Boost functional verification with SLEC 2009-02-09
SLEC has the capability to formally verify RTL implementations against a specification in C/C++ or System C.  
Design Issues And Verification Challenges For Home Networks 2001-03-27
This paper looks into some of the challenging questions and considerations when choosing the right processor for the Home Network application design.  
Multi-language SoC verification for multi-site projects 2008-02-18
Know how to address design issues that involve .managing and automating much of the SoC level integration that comes from various sites.  
External process augments verification infrastructure 2006-09-25
The paper discusses how to connect an external (unrelated) process to a simulator environment using inter-process communication.  
Translating MATLAB-to-C, Part 3: Code generation, verification 2009-03-06
Know the complex functions and the role C interface constraints play in the translation process.  
Verification firm starts partners program 2001-04-15
Seeking deeper integrations with third-party EDA tools, Verisity Design Inc. announced its Verisity Interoperability Partners (VIP) program. This technical article discusses that program and its effect to the EDA industry.  
Modeling, verification of backplane press-fit vias 2004-10-01
Look at active and passive components of a system differently to push higher data rates through backplane channels.  
Functional verification of 10M-gate SoCs 2002-03-01
This technical article discusses the advantages of implementing the "white-box" design methodology for instrumenting RTL structures inside very large SoC designs as compared to the traditional black-box test suites.  
Verification issues for reconfigurable IP 2005-03-01
To improve reusability, IP providers are developing clever ways to configure IP and enable semicustom IP blocks while reducing the potential to break the code  
Power distribution for deep-submicron SoC designs 2001-05-01
Power grid verification is becoming an imperative in deep-submicron design  
Moving beyond advanced design geometries 2008-08-01
Design verification will play a major role in reducing design cost and improving new product yields and product platforms  
Emulation wins over FPGA prototyping 2008-01-16
System-level verification solutions require the power of emulation to address the opposing forces of increasing complexity and shrinking design schedules  
Technical intro to functional qualification, Part 3 2009-04-13
Read about assertion which is treated like a checker in the verification environment in the context of functional qualification  
Employing intelligently integrated physical design 2011-01-17
Learn about an improved approach to physical verification based on intelligent point integration with physical design  
Verifying your low-power designs 2007-08-27
Here are some of the power reduction techniques used in today's chip designs, the pitfalls of each, and how to set up low-power verification  
Simulating UWB RFICs 2006-08-04
Ansoft and UMC describe new technologies for RF and analogue design, and verification within established design flows. Circuits from an ongoing project to develop an ultrawideband MB-OFDM radio are used to demonstrate new technological capabilities  
Interoperable tools ease equivalence checking 2003-08-18
Without postponing the verification cycle and risk to design integrity, an automated setup allows users to solve new verification problems  
Use Spice tools to simulate large-scale analogue/RF circuits 2007-11-28
Here's a taste of the power that analogue fastSPICE simulators can bring to large-scale analogue/RF verification  


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Clive Maxfield Strange modes of transport and other "stuff"

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