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EE Times India - total search 169 articles sort by date sort by relevance
Deliver faster turnaround time with in-design metal fill 2010-01-11
This article discusses the traditional flows and their inherent challenges, establishing the need for an in-design flow that would mitigate those challenges.  
Reusable models trim software costs 2001-05-01
The cost of developing embedded real-time software can be reduced by using an architecture that supports integration of software components and their behavior, and reconfiguration of component behavior at executable-code level.  
Testing FPGA and FPGA-based board interconnections 2008-08-12
This article describes a simple, effective and generic solution to check signal connectivity between FPGAs on a high-density prototyping board with multiple FPGAs and hundreds of signals.  
Flow is shaky for programmable SoCs 2001-03-01
Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust.  
Open source hardware 2002-12-02
This technical article discusses how open-source techniques in hardware design are still impossible to achieve with the current technology available to engineers.  
Spiral inductor modelling for RF ICs 2006-04-17
This article examines a number of issues when using simulation software, including substrate effects, 3D conductors, conductor losses, frequency effects, current return, extraction of model parameters, and convergence of simulation.  
Test wireless devices for HSUPA compatibility 2008-12-15
Read about several high-speed uplink packet access (HSUPA) tests aimed at gauging performance.  
Process design kits take aim at custom ICs 2001-04-15
This technical article describes Cadence Design Systems' process design kits for 0.25µm and 0.18µm process simulations.  
Optimizing ASIC design flow for SoPCs 2001-05-01
System-on-programmable-chip technology has characteristics of both board-based design and ASIC-based SoC design. The immediate attraction of SoPC is that the design can be up and running very quickly.  
Developing a design methodology for embedded memories 2001-01-01
Developing a design methodology for  
SuperHyway provides SoC backbone 2000-12-01
A step ahead of CompactPCI, Compact Packet Switching Backplane (cPSB) is emerging as a viable solution for interconnect problems.  
Scripts bind EDA tools 2001-06-01
Different EDA recommendations/innovations are emerging to answer the needs of manufacturers and OEMs.  
Mobile net demands optimized design 2001-02-01
Manufacturers of wireless Internet access systems will play a key role in delivering a new class of wireless services and applications for entertainment, e-commerce and multimedia messaging.  
Complex SoCs breed new design strategies 2001-03-01
Building effective system-on-chip (SoC) devices are nudging electronic engineers and designers today as they are asked to confront the diverse circuit types that can coexist on a single chip.  
Optical outdos copper in InfiniBand tests 2008-07-01
High-performance optical interconnect cables designed to enable computing clusters to scale out substantially further than existing 24AWG copper cables were recently on the market. This article looks at the test configuration for a new InfiniBand optical cable from Intel.  


 
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