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EE Times India - total search 167 articles sort by date sort by relevance
Analogue verification opportunities 2008-12-24
Read about the techniques for easing analogue/RF systems and circuit design, as well as verification  
Challenge X: Verification testing, validation, and control strategy 2007-07-19
This article is part of a series featuring the Ohio State University design team's four-year hybrid power train development effort using Model-Based Design tools. It focuses on verification testing, validation and control strategy  
Accelerate functional verification 2008-11-25
Read about an approach which promises to simplify the adoption and proliferation of new verification technologies  
Planning the verification project 2006-01-01
Project management is all about planning and execution. "Good" verification involves a formulaic model to drive the whole verification project with an executable plan  
Verification IP reuse for complex networking ASICs 2008-09-18
Here is a verification environment that lays down the methodology blueprint for future ASIC verification projects and stretches the boundary of IP reuse  
Co-verification of an RTOS in a SoC 2002-01-16
This technical article discusses the evolution of co-verification in HW/SW development as it has evolved from an optional requirement to a mandatory one in SoC designs  
Applying constrained-random verification to microprocessors 2007-12-10
This article proposes an object-oriented solution for processor verification challenges  
Verification reuse ensures predictable design 2002-07-16
Find out ways to make verification efforts reusable using the National Semiconductor Geode GX2 system so that integration stages become predictable instead of schedule black holes  
Go beyond verification tool limits for analogue/RF designs 2008-09-15
Know the limits of today's design approaches, and how the challenges of analogue/RF design and verification may be reduced by new EDA tools and techniques  
Solving problems early on using co-verification 2004-11-16
Learn the importance and benefits of hardware and software co-verification before the physical design becomes available  
Eliminating the problems of dual physical verification 2003-05-02
A single verification tool that can perform fast interactive verification on cells and blocks, as well as fast and accurate batch verification on full-chip SoCs, is essential to meet today's time-to-market schedules  
Design and verification strategies for complex systems 2006-06-12
This is the first of a two-part article that discusses conventional embedded design and verification techniques, and the trade-offs associated with each approach  
Build OCP verification components 2009-02-16
Know the two key aspects of OCP that were adopted for the architecture of a verification component  
Co-verification speeded up for design 2001-06-16
Innoveda's boosted V-CPU hardware/software co-verification system through a link with Axis Systems' simulation accelerator can increase the performance of hardware portions of the co-verification process  
Reconfigurable computing accelerates network device verification 2001-02-01
This technical paper describes the use of reconfigurable computing (RCC) coprocessor technology and its attendant software to speed the verification of a large networking device  


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