Assertion methodologies for Verilog design

What is VHDL?
VHSIC Hardware Description Language (VHDL), where VHSIC is an acronym for Very High-Speed Integrated Circuits. It's an IEEE-standard HDL that was originally developed by the U.S. department of defence for documenting electronic systems. The language is specified in the IEEE 1076 standard and used to describe and simulate ICs and systems before fabrication. It is an alternative language to Verilog.

What is Verilog?
The Verilog HDL is an industry-accepted standard hardware description language commonly used to design ASICs and FPGAs. The designers of Verilog wanted to design a language based on the C programming language so that it would be familiar to engineers and readily accepted. In practice, it bears only a vague resemblance to C.

What is RTL?
RTL stands for Register Transfer Level. It is a high-level hardware description language (HDL) used for defining digital circuits. The most popular RTL languages are VHDL and Verilog.