Global Sources
EE Times-India
 Outlook 2010   VLSI Design Conference 2010   Next-gen video surveillance gets smarter, high-def
EE Times-India > T&M
 
 
T&M  

Practical DFT leads to highly testable ASICs

Posted: 01 Jun 2001  Print Version  Bookmark and Share Subscribe

Keywords: dft  design-for-test  asic design  test specification  pcb test 

[Summary of tips] Combine classic design-for-test methodologies, such as scan and BIST, with practical DFT, to clear the path to a highly testable designView the PDF document for more information.
 

Comment on "Practical DFT leads to highly testab..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Highly Recommended Application Notes

Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut