EDA/IP 
Cadence, Agere tool would foster IC co-design
Keywords: chip planning interconnect pcb design
[Summary of tips] BROKEN_TABLE_ HIDDEN_END -->Seeking to develop a new type of EDA tool, Cadence Design Systems Inc. and Agere Systems—the former Lucent Microelectronics—partnered to develop chip I/O planning capability. Such a tool would promote the co-design of ICs and chip packages, which are now two disparate functions.The partner......Please login or register with us to view this article>>
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