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Ultra-low-power DSP design

Posted: 30 Aug 2007  Print Version  Bookmark and Share Subscribe

Keywords: low-power DSP  algorithm  processor architecture  clock gating 

[Summary of tips] Many emerging applications require extremely low-power DSPs. This article shows how to design a sub-100uW DSP, using an electrocardiogram application as an example. It shows how to achieve low power by tuning the algorithm, processor architecture, and memory system, as well as through clock gating. It presents detailed power re......
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