EDA/IP 
Design tools target ARM core
Keywords: resonant-clock processor silicon validation standard-cell design flow
[Summary of tips] Cyclos Semiconductor Inc. announced a proof-of-concept processor implementation using its platform and standard-cell design flow. This processor can be used to achieve low-power, resonant-clock implementations of synchronous ASICs and SoCs without changes to their development and verification environments. Cylcos said it is lic......Please login or register with us to view this article>>
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