EDA/IP 
OVM quickly find bugs in IP design
Keywords: Open Verification Methodology controller area network SystemVerilog verification IP
[Summary of tips] Cadence Design Systems Pvt Ltd, a subsidiary of Cadence Design Systems, Inc. announced that KPIT Cummins Infosystems Ltd has successfully used the class-based Open Verification Methodology (OVM) to develop controller area network (CAN) verification IP for the automotive market. The OVM helped boost KPIT Cummins' productivity an......Please login or register with us to view this article>>
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