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Custom PCI timing budgets for FPGAs

Posted: 18 Nov 2008  Print Version  Bookmark and Share Subscribe

Keywords: PCI Local Bus Specification  timing budgets 

[Summary of tips] The PCI Local Bus Specification, Revision 3.0 (the PCI specification), defines two timing budgets. One timing budget is for use with 33MHz operation, and the other timing budget is for use with 66MHz operation. These two timing budgets define the I/O timing parameters for compliant 33MHz and 66MHz components.In open systems, co......
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