Memory/Storage 
Antifuse memory IP offers low-power operation
Keywords: non-volatile memory antifuse-based OTP Memory IP power demands
[Summary of tips] A traditional non-hierarchical memory array architecture has a long bit- and word-line architecture that dissipates a lot of power.Controlling array voltagesOne additional method is to reduce the voltages used in the array. The Sidense SLP macros require two voltage levels in addition to the core VDD supply voltage: VPP for pr......Please login or register with us to view this article>>
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