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Serdes-capable FPGAs tout low power consumption

Posted: 26 Feb 2009  Print Version  Bookmark and Share Subscribe

Keywords: 65nm FPGAs  Serdes chips  clock distribution ICs  mid-range FPGA segments 

[Summary of tips] Seeking to grab share in a depressed market, Lattice Semiconductor Corp. has launched a three-prong attack.As part of the moves, the PLD specialist has introduced its first 65nm FPGAs in the market. Aimed for the emerging ''mid-range'' sector, the LatticeECP3 line claims to be the industry's lowest-power, Serdes-capable FPGAs. ......
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