Global Sources
EE Times-India
 DAC 2010 coverage   Academia on employability gap   VLSI Design Conference 2010
EE Times-India > EDA/IP
 
 
EDA/IP  

Technical intro to functional qualification

Posted: 03 Apr 2009  Print Version  Bookmark and Share Subscribe

Keywords: verification  Functional qualification  mutation analysis  Certitude 

[Summary of tips] If there were a bug in your design, could the verification environment find it? Functional qualification is the first technology to provide an objective answer to this fundamental question. It is an addition to the solutions available for the increasingly challenging task of delivering functionally correct silicon on time and o......
Please login or register with us to view this article>>
 

Comment on "Technical intro to functional qualif..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Highly Recommended Application Notes

Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut