Global Sources
EE Times-India
 DAC 2010 coverage   Academia on employability gap   VLSI Design Conference 2010
EE Times-India > EDA/IP
 
 
EDA/IP  

Sign-off flow shortens design cycle

Posted: 23 Apr 2009  Print Version  Bookmark and Share Subscribe

Keywords: sign-off flow  RF design kit  EDA tools  silicon foundry 

[Summary of tips] Seeking to accelerate the product development process, Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) is rolling out a one-two punch in the arena: It has unveiled a mixed-signal/RF design kit as well as a foundry-specific integrated sign-off flow.The mixed-signal/RF reference design kit (MS/RF RDK) initially targets 65nm pro......
Please login or register with us to view this article>>
1 • 2 Next Page Last Page
 

Comment on "Sign-off flow shortens design cycle"
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Highly Recommended Articles

Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut