Global Sources
EE Times-India
 DAC 2010 coverage   Academia on employability gap   VLSI Design Conference 2010
EE Times-India > EDA/IP
 
 
EDA/IP  

Exar to use Synopsys platforms for 65nm designs

Posted: 28 May 2009  Print Version  Bookmark and Share Subscribe

Keywords: EDA partner  design environment  IC compiler  verification 

[Summary of tips] Exar Corp. has signed an expanded business agreement to establish Synopsys as its leading EDA partner. As a result of the new multi-year agreement, the Synopsys' Galaxy Implementation and Discovery Verification platforms will be Exar's key design environment for designs at 65nm and below."We conducted an extensive evaluation pr......
Please login or register with us to view this article>>
 

Comment on "Exar to use Synopsys platforms for 6..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Resources

Android faces hurdles in low-cost arena

Android 4.0's step-up in memory and processor demands will make it less attractive in the low-cost smartphone market...

Showcasing the Rs.1,121.08 computer

A UK-based foundation claims the Raspberry Pi, a Rs.1,121.08 ($25) computer board...

Mobile processors boom

Strong growth of mobile devices up until 2016 will drive an exponential growth for mobile processors...

Google, Samsung team on Android 4.0

Samsung's Galaxy Nexus is the first smartphone launched with Google latest Android 4.0 OS...

Intel withdraws Smart TV chip business

Intel reveals plans to withdraw its Smart TV chip business.

Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut