EDA/IP 
PCIe 3.0 cores offer low power, latency
Keywords: PCI Express 3.0 board-level interconnect PHY controller cores
[Summary of tips] Gennum Corp.'s Snowbush IP group has completed silicon core designs of a controller and physical-layer device for PCI Express version 3.0. The company also signed up PLX Technology as its first customer. Its early days for the next generation of the board-level interconnect which has a maximum theoretical throughput of 8 GigaTr......Please login or register with us to view this article>>
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