EDA/IP 
PCIe 3.0 cores offer low power, latency
Keywords: PCI Express 3.0 board-level interconnect PHY controller cores
[Summary of tips] The immanent delivery of the GDS files "enables [PLX] to introduce PCIe Gen 3 products at the same time as market-leading CPU, chipset, and graphics suppliers," said David Raun, vice president of marketing and business development at PLX.Graphics chips are expected to be the first to use the new interconnect, perhaps as early a......Please login or register with us to view this article>>
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