Global Sources
EE Times-India
 DAC 2010 coverage   Academia on employability gap   VLSI Design Conference 2010
EE Times-India > EDA/IP
 
 
EDA/IP  

FPGA debug tool cuts design time by 50%

Posted: 03 Mar 2010  Print Version  Bookmark and Share Subscribe

Keywords: FPGA  debug tool  bug fix  software 

[Summary of tips] GateRocket Inc. has released the latest version of its RocketVision debugging software that reduce overall design bring-up time by 50 per cent or more compared with traditional approaches by enabling engineers to find and fix bugs faster and avoid unnecessary re-runs of synthesis-to-place-and-route iterations.The new features a......
Please login or register with us to view this article>>
 

Comment on "FPGA debug tool cuts design time by ..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Highly Recommended Articles

Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut