3D PLDs pack 5.5MB RAM, 920 parallel I/Os, 44 PLLs

What is PLL?
A phase-locked loop or phase lock loop (PLL) is a control system which generates a signal that has a fixed relation to the phase of a "reference" signal. A PLL circuit responds to both the frequency and the phase of the input signals, automatically raisin

What is FPGA?
Short for Field-Programmable Gate Array, a type of logic chip that can be programmed. An FPGA is similar to a PLD, but whereas PLDs are generally limited to hundreds of gates, FPGAs support thousands of gates. They are especially popular for prototyping integrated circuit designs. Once the design is set, hardwired chips are produced for faster performance.