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Processor packs on-chip debug with JTAG interface

Posted: 25 Mar 2010  Print Version  Bookmark and Share Subscribe

Keywords: processor  DSP  wireless sensor 

[Summary of tips] Centre Suisse d'Electronique et de Microtechnique (CSEM) has launched the Icyflex family of 16/32bit RISC processor cores that consume as little as 6µW/MHz.The flexible architecture allows for different combinations of control and DSP functionality.The Icyflex architecture was developed as a flexible processor with both DS......
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