Global Sources
EE Times-India
 
 
Embedded  

No innovation wall for 25nm MLC NAND

Posted: 05 Apr 2010  Print Version  Bookmark and Share Subscribe

Keywords: 25nm NAND teardown  NAND flash  solid-state drive 

[Summary of tips] The extent of immersion-lithography tool usage cannot be known, but our end-of-the-wordline analysis and STI pattern analysis of the IMFT device has shown some interesting spacing patterns that could give useful insight into the lithography and SADP processes. Technically, immersion lithography is the mainstream technology for ......
Please login or register with us to view this article>>
 First Page Previous Page 1 • 2
 
 

Comment on "No innovation wall for 25nm MLC NAND"
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Highly Recommended Application Notes

Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut