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EE Times-India > EDA/IP

Cadence, TSMC build stronger ties in 16nm FinFET process tech

Posted: 11 Apr 2013     Print Version  Bookmark and Share

Keywords:Cadence  TSMC  FinFET  16nm process 

[Summary of tips] Cadence Design Systems Inc. is continuing its multi-year partnership with Taiwan Semiconductor Manufacturing Company Ltd (TSMC) to develop the design infrastructure for 16nm FinFET technology. The technology will target advanced node designs for mobile, networking, servers and FPGA applications. The deep collaboration, beginnin......
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