Home | Login | Register Now   [Mar 21,2010]
Global Sources
EE Times-India
For Registered Users EE Times-India Home / For Registered Users

Speed up down-converter implementation with rapid prototyping
Author: Jamie Bowman, Daniel Garca-Als, Garrey Rice

Using the right EDA tools, performance can be simulated, analysed and design characteristics automatically converted to generic HDL code appropriate for synthesis and FPGA implementation.

Please login or register with us to view this article>>


If you have already registered on the following websites, please log in using your email address and password

EE Times-India sites:

 
Go to top         Connect on Facebook        Follow us on Twitter        Follow us on Orkut