Using 2- and 4-inch epitaxial wafers with a 650µm thick sapphire substrate, researchers from Leti - a research institute of CEA Tech, grew a whole-wafer LED epitaxial structure consisting of a stack of 2µm of undoped GaN, 4µm of Si doped n-GaN, an active region made of GaN/InGaN multiple quantum wells (MQW), an AlGaN electron blocking layer and a 200nm Mg doped p-GaN at the top. Then, an Ag-based P metallisation layer is deposited on top completed by a SiO₂ hard mask.

Only then, the pixels were shaped through a single lithography step to etch the hard mask, the top metallisation layer and then the GaN mesas, defining the µLEDs' self-aligned geometry.

 
wafer level fig1 (cr) Figure 1: Researchers from Leti, a research institute of CEA Tech, have developed a self-aligning μLED fabrication process that supports the creation of high-resolution arrays of μLED at 10-micron pitch (roughly equating a 2540dpi resolution).  

The pixels' sidewalls were passivated and a common cathode was created through a damascene process. That included the electrodeposition of copper to fill the mesa grid and a chemical mechanical planarisation step to reach the top pixel SiO₂ hard mask through which each µLED were individually contacted via another damascene metallisation step.

In a paper titled “Processing and Characterisation of High-Resolution GaN/InGaN LED Arrays at 10-Micron Pitch for Micro-Display Applications,” presented at SPIE Photonics West in San Francisco, the researchers reported the fabrication of circular µLEDs with diameters of 5µm, 6µm, 7µm and 8µm at a pixel pitch of 10µm. They demonstrated the viability of their manufacturing process by creating several wafer-level micro-displays in the shape of 873x500 pixel arrays (each with an 8.7x5mm footprint).

 
wafer level fig2 (cr) Figure 2: Schematic representation of the damascene process used to create a common cathode filling all space between every pixels of the μLED matrix.  

What the experiment validates is that by filling the whole volume between the micro-LEDs, the common cathode spreads the electrical current between the pixels, providing good thermal dissipation and preventing voltage drops within the micro-LED matrix.

Of course, higher resolution and/or bigger size µLED arrays could be manufactured depending on the size of the wafer. Leti's experiment on 4-inch wafers yielded approximately 100 such 873x500 µLED arrays. Increasing density or size, yield might decrease accordingly, in a comparable manner to other kind of microdisplays (such as OLED, LCOS).

 
wafer level fig3 (cr) Figure 3: Optical microscope image of the corner of a 873x500 pixel μLED matrix before hybridization. The emissive μLED region is located on the top right part of the photograph while the two horizontal and vertical 4 pixel large lines are connections to the buried common cathode.

 
wafer level fig4 (cr) Figure 4: A 4-inch LED wafer after CMP planarisation of the common cathode, each rectangle on the wafer is an 873x500 pixels μLED matrix.