LDRA's tool suite for the PowerPC assembler language has been updated to support all 32- and 64-bit PowerPC chips used in safety-critical environments, including communication terminals, commercial and military avionics, unmanned air vehicles and missile and space flight applications.

The support, according to LDRA, will enable customers, including those who have been using the LDRA tool suite for many years on traditional avionics platforms, to move to the latest versions of PowerPC chips and compilers and confidently perform Object Code Verification (OCV) required for DO-178B/C compliance.

LDRA said the tool suite will make it easy for avionics customers to certify their systems as they upgrade their 604-based legacy PowerPC chips to the newer e500 and e600 chips. LDRA’s updated assemblers support the e200, e300, e500, e600, e5500 and e5600 PowerPC families, as well as traditional PowerPC chips such as the 603e and 604.

The LDRA tool suite is the only commercially available software solution able to qualify assembler code for certification, according to the company. Used to demonstrate source-to-object-code traceability, the LDRA tool suite for PowerPC assemblers can analyse the relationship between the two levels of code and highlight any instances of additional or extraneous code at the object level. This integration ensures that the LDRA tool suite will support organisations that must demonstrate process compliance, particularly for applications where complete OCV must be realised to meet the highest levels of safety certification as required under the DO-178B/C Level A safety-assurance standard.

The updated assemblers have also been integrated into the latest LDRA front ends, which enhances code visibility through a graphical display of assembler code. This results in reports that show clearly that statements and branches have been exercised in the assembler code and cross-correlate the results between the high-level language and assembler.

Meanwhile, API access is possible using LDRA data files and enables customers to retrieve results from assembler testing and integrate them with C/C++ test results. This capability is particularly useful in object code verification exercises. Full verification capabilities are available for both low-power platforms, such as the e200, and full systems with multi-core environments where per-core coverage can be recorded.

The new suite of PowerPC assemblers can also be used to test pure PowerPC assembler hand code, according to LDRA. Test and verification activities can be performed on the assembler hand code portions of a system, as well as object code verification of the C/C++ portions.