IDT's RapidIO RXS switches, coupled with Xilinx UltraScale FPGAs, deliver ultra-low 100ns latency interconnect and programmable computing.
Integrated Device Technology has introduced the RapidIO Gen3 interoperability with Xilinx FPGAs, enabling a key technology for global rollout of 5G and other advanced network systems. IDT's RapidIO RXS switches, coupled with Xilinx UltraScale FPGAs, deliver a combination of ultra-low 100ns latency interconnect and programmable computing with application-specific accelerators needed for 4G advanced and 5G programs.
IDT has also developed a wireless data compression solution on Xilinx Zynq-7000 All Programmable SoCs, which allows more data to fit into a network fibre or link. This solution is targeted for remote RapidIO units, repeaters and base stations in the front haul of networks to increase front haul capacity with compression ratios ranging from 2:1 to 3:1. IDT has also developed high-performance timing solutions on Xilinx devices, including IEEE 1588 high-performance time synchronisation products to meet time alignment error requirements between 5G RRUs in Cloud Radio Access Networks (C-RAN).
Beyond 5G infrastructure challenges, IDT and Xilinx technologies together solve problems in high-performance computing, hyperscale cloud data centres, mobile edge computing and mission-critical embedded systems.
IDT and Xilinx recently completed interoperability testing between IDT’s RXS family of RapidIO switches with Xilinx FPGAs at 10.3125 Gbaud per lane. These FPGAs also support transceivers up to 32 Gbaud, providing a path to scale to higher bandwidth connectivity.
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