A Growing Ecosystem for Intel Pathfinder for RISC-V

Article By : Intel Pathfinder for RISC-V

Tessolve is working to enable its first RISC-V based SOC reference design in early 2023 using Intel Pathfinder for RISC-V.

Intel Pathfinder for RISC-V has launched an exciting array of new features as well as continues to grow a healthy ecosystem around the initiative. Designed for SOC architects and system software developers, Intel Pathfinder for RISC-V is a pre-silicon development environment that supports IP selection via testing for compatibility and performance, as well as early-stage software development using FPGA and simulator platforms.

The new features include the unification of the Starter and Professional Editions to ease user transitions, Static Kernel Debug for users wanting to debug the Linux kernel, multi-core support via SMP Linux, a new FMC add-on board that will be available next quarter, which will enable new I/O interfaces and simplify connectivity, and a new Cyclone 10 GX development board that will be supported in the first quarter next year, to enable lower cost and additional flexibility.

“Maintaining a torrid pace of execution and fostering ecosystem collaboration are key imperatives for Intel Pathfinder for RISC-V,” said Vijay Krishnan, General Manager, RISC-V Ventures from Intel.

“The Incubation & Disruptive Innovation (IDI) Group at Intel has the charter to take new business opportunities from concept to scale. We are excited to see Intel Pathfinder for RISC-V grow rapidly while continuing to adapt to market needs,” said Sundari Mitra, Chief Incubation Officer, Corporate Vice President, and General Manager, IDI.

“Intel Pathfinder for RISC-V highlights Intel’s strategic investments in accelerating the adoption of open architectures, with the ultimate goal of creating greater value and choice for end-users,” said Saf Yeboah, Chief Strategy Officer and Senior Vice-President, Intel Corp.

Intel Pathfinder for RISC-V is made possible by contributions from Intel and key ecosystem partners:

Open-source Simulator Supporting a Breadth of RISC-V Models

“Renode is an open-source software development framework with commercial support from Antmicro that lets you develop, debug and test multi-node device systems reliably, scalably and effectively. We welcome Antmicro and Intel’s cooperation to enable easier architectural exploration and pre-silicon development by providing vector instruction-capable RISC-V platform simulation in Renode for Intel Pathfinder in early 2023 and look forward to a broader relationship over time,” said Peter Gielda, CEO, Antmicro.

“Renode gives you the ability to do a lot of work on real-world objects without ever having to have any hardware. It allows you to have continuous integration systems which run very comprehensive test suites without having to set up bespoke hardware CI systems. This makes it a powerful framework for testing, and in fact it has enabled significantly more insight into product development,” commented Tim Ansell, Software Engineer at Google.

New floating-point unit for RISC-V cores

“CalligoTech has designed Posit Numeric Unit (PNU) IP, a Coprocessor for real-number computations using POSITs – a new number system with higher accuracy and better dynamic range, at reduced power. Within the Intel Pathfinder for RISC-V developer environment, we will be enabling our PNU with CORE-V CVA6 cores and our enhanced RISC-V Compilers (C/C++/gFortran), thus unlocking new capabilities and opportunities for us and our customers,” noted Anantha Kinnal, Managing Director, Calligo Technologies.

Enhanced audio capabilities for hearables, wearables and smart home devices

“CEVA is pleased to announce that its CEVA-BX1 and CEVA-BX2 audio DSP IP will be available with Intel Pathfinder for RISC-V in the Q1’23 timeframe, enabling customers to evaluate best-in-class DSP and audio front-end software IPs from CEVA combined with RISC-V based host platforms. We look forward to working with Intel to create the next generation of voice and audio enabled devices based on open architectures,” said Chad Lucien, VP & GM Sensors and Audio BU, CEVA.

Bringing RISC-V cores and tools to education institutes

“Codasip is excited to collaborate with Intel to enable undergraduate and graduate level courses that will benefit from Codasip RISC-V IP and Intel Pathfinder for RISC-V. Our goal is to be integrated into courses at multiple universities in the fall of 2023,” said Keith Graham, Vice President of University and Customer Experience Program, Codasip.

Ultra-low power SOC for AIoT

“Embedded A.I. Systems (EMASS) is announcing today the intent to deliver engineering samples of the Edge AI SOC named ECS-DoT in Q1’23. We are very excited to work with Intel. Our board support package (BSP) integrates Intel Pathfinder for RISC-V IDE and combined with the ultra-low power consumption of our SOC, is poised to unlock new capabilities and use cases for customers in the fast-growing AIoT segment,” said Mohamed M Sabry Aly, Founder EMASS & Assistant Professor at Nanyang Technological University.

Combining RISC-V with neuromorphic accelerators

“General Vision is honored to join the Intel Pathfinder for RISC-V ecosystem. By combining our NeuroMem technology with RISC-V host processors and Intel Pathfinder for RISC-V developer tools, we are enabling the next generation of Real Time Learning Pattern Recognition featuring low latency and ultra-low power,” commented Guy Paillet, co-founder and CEO of General Vision Inc.

RISC-V cores and SOC reference designs for efficient scaling

“As we roll-out a comprehensive range of RISC-V commercial we see a synergistic opportunity to use Intel Pathfinder for RISC-V as the IDE that will enable our customers and SOC design partners to scale efficiently. InCore is keen to grow this collaboration with Intel to take full advantage of the massive customer interest in RISC-V based SOCs by providing a comprehensive, class leading development environment,” said G.S. Madhusudan, CEO & Co-Founder, InCore Semiconductors.

Solution for regenerative agriculture

“LATERAL is delighted to apply innovative edge solutions utilizing AI-driven predictive analytics in supporting Regenerative Agriculture to provide farmers rich data insights that enable food safety, optimal crop quality and higher yields. Combining LATERAL’s Edge platform application-level capabilities with IOTech middleware, RISC-V silicon and Intel Pathfinder for RISC-V, we plan to field test our solution targeting the indoor farming community in 2023,” said Ed Lisle, President and CTO, LATERAL.systems.

“IOTech has been working with Intel Pathfinder for RISC-V since its launch last quarter, and we are pleased to see the development of real-life applications that take advantage of IOTech’s edge software in combination with advanced analytics for Regenerative Agriculture and the latest RISC-V hardware,” said Jim White, CTO, IOTech Systems

“Renesas is pleased to provide our customers a new option of RISC-V based MPU with RZ/Five, which is ideal for use cases such as industrial gateways and controllers,” commented Sailesh Chittipeddi, PhD, Executive Vice-President and General Manager, IoT and Infrastructure Business Unit, Renesas Electronics.

“As a leading supplier of RISC-V processor IPs with design wins ranging from ASSP microcontrollers to datacenter AI accelerators in major semiconductor and system companies worldwide, Andes is pleased to be part of the Intel® Pathfinder for RISC-V* rollout. Intel Pathfinder for RISC-V enables our customers software development using Open-Source tools, FPGA platforms for early SoC development and verification, and easy migration path from FPGA to ASIC via Intel Foundry Services,” said Charlie Su, President and CTO, Andes Technology Corp.

RISC-V within the engineering curriculum

“PES University, one of India’s leading teaching and research institutes, has already revamped the computer architecture course within the undergraduate program to be entirely on RISC-V. PES is also partnering with Intel to enable its students to use Intel Pathfinder for RISC-V as a development tool. We look forward to growing our RISC-V collaboration with Intel to enable the next generation of IT professionals who are adequately prepared to tackle tomorrow’s challenges,” said Prof. Madhura Purnaprajna, PES University.

RISC-V design services

“Prodapt is pleased to join Intel’s ecosystem by actively promoting Intel Pathfinder for RISC-V as a developer tool for its design services customers. We believe our SOC design services combined with Intel Pathfinder for RISC-V will be of great value to our mutual customers,” noted Dinesh Tyagi, head of ASIC Business, Prodapt ASIC Services.

USB controller for Intel Pathfinder for RISC-V

“SLS is announcing today support for Intel Pathfinder for RISC-V via its USB Host and Device Controller IP for the Cyclone 10 GX development board, which is a recent addition to the family of FPGA boards supported by Intel Pathfinder for RISC-V. SLS hopes to expand this relationship over time by providing peripheral IP that will accelerate the adoption of RISC-V across FPGA and ASIC designs,” said Paresh Patel, CEO, System Level Solutions Inc.

RISC-V reference designs

“Tessolve is working to enable its first RISC-V based SOC reference design in early 2023, using Intel Pathfinder for RISC-V as the preferred development environment. Tessolve and Intel will implement these reference designs to drive cost-effective and rapid scaling of RISC-V based designs,” said KiranKumar Nagendra, AVP of Embedded Systems, Tessolve.

Exploring CORE-V CVA6 open-source manycore RISC-V architectures

“The University of California Santa Barbara is pleased to collaborate with Intel within the OpenHW ecosystem on research that will enable octa-core and higher configurations of the open-source CORE-V CVA6 RISC-V cores with Intel Pathfinder for RISC-V. Over time, we expect this work will benefit RISC-V developers across academia, research, and commercial organizations,” said Jonathan Balkind, Assistant Professor, Computer Science, University of California Santa Barbara.

“We are excited to see leading OpenHW ecosystem members such as academic & research institutes like UCSB and technology leaders like Intel come together to accelerate the adoption of CORE-V CVA6 open-source RISC-V cores. The OpenHW Group is committed to fostering global collaboration that fuels the development of open-source cores, related IP, tools and software,” said Rick O’Connor, President & CEO, OpenHW Group.

 

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