2019-12-12 - Nitin Dahad

First Core with RISC-V Vector Instruction Extension Delivered

Andes’ new processor cores enable scalability by delivering RVV instruction extension and new memory subsystem. The company claims to be…

2019-12-09 - Nitin Dahad

UltraSoC Donates Trace Encoder

Having the encoder available should help minimize the possible risk for potential RISC-V developers.

2019-09-16 - Nitin Dahad

Can Carbon Nanotubes Take Us Beyond Silicon?

MIT's work on carbon nanotube field-effect transistors validates a promising path towards practical beyond-silicon electronic systems.

2019-06-10 - Nitin Dahad

Qualcomm is the Newest Investor in SiFive

RISC-V is heading for mobile. Qualcomm participated in SiFive's $65.4m funding round. We talked CEO Naveed Sherwani recently about the…

2019-02-19 - Hailey Lynne McKeefry

RISC-V: A Boon for Military and Aerospace

RISC-V is getting attention from just about every vertical market, but it offers a number of particular benefits for military/aerospace…

- Rick Merritt

Can SiFive Revive the Semiconductor Industry?

Today, most of SiFve’s customers just buy IP. But in five years, he believes that as many as two-thirds of…

2019-01-10 - Sufia Tippu

Open-Silicon & SiFive to Chisel RISC-V in India

The fact that this open architecture has the capacity to bring custom silicon to all inventors and makers will benefit…

2019-01-04 - Sufia Tippu

Krste Asanović : RISC-V Momentum is Massive in India

Indigenous microprocessor on RISC-V ISA, “Shakti” leads the way

2017-10-05 - Rick Merritt, EE Times

RISC-V Boots Linux at SiFive

Startup SiFive has taped out and started licensing a version of the RISC-V core that runs Linux, expanding its set…