The conference's IoT session will include the first of two talks on RISC-V, while five sessions on neural nets architectures will dominate the second day.
This year's Hot Chips conference in Silicon Valley is promising to be a diverse event, spanning automotive, neural nets, gaming, SoC design and big-iron server CPUs. Even some good proposals were rejected by a programme committee that received the most submissions ever.
As always, the event starts off with a day of tutorials, this year on the P4 language for software defined networking (SDN) and an autonomous car session hosted by Nvidia. The language P4 a bit esoteric for me, but SDN is a hot topic.
Phillip Alvelda will give an opening keynote that may shed light on whether brain-machine interfaces could be the future of computing or limited to helping those with disabilities. He just completed a DARPA stint focused on this cutting-edge topic.
One session will stage a graphics battle royal among Microsoft and its Xbox One X aka Scorpio chips, AMD’s Vega and Nvidia’s Volta. I wonder why Nvidia thought building a gigantic 815mm² die was a good idea. As of this writing we don’t have many details on the AMD Vega chip, but I think it’s a safe guess it will be significantly smaller. The Microsoft Scorpio chip uses AMD’s GPU and CPU architectures, but there’s bound to be some Microsoft specific functionality as well.
An IoT session will include the first of two talks on RISC-V, the open-source CPU architecture spurring lots of interest. We’ll hear about an SoC from SiFive and later that day an open source fabric for accelerators.
This year automotive as its own session with presentations on autonomous driving platforms from MCU giant Renesas and start-up Swift Navigation on its GPS super-localisation technology.
A blandly named “processors” session will include talks on Knight’s Mill, Intel’s latest Xeon Phi accelerator for machine learning and an FPGA accelerator from Baidu. Also in this session, ThinCi, a vision processing start-up with funding from automotive tier-one Denso, will describe its Graph Streaming processor. The chip, originally designed as a graphics engine, has been repurposed as a machine learning and computer vision processor using micro-threads that can spawn more threads.
A dedicated FPGA session on the second day of the event hosts presentations from Altera/Intel, Xilinx and Amazon on the use of FPGA accelerators. Maybe some form of machine intelligence can explain to me why the Baidu presentation was not in this session.
Five sessions on neural nets architectures will dominate the second day along with a keynote by Jeff Dean of Google, a noted AI researcher. Start-up Wave Computing will talk about its architecture, Google will provide some additional information about its Tensor Processing Unit (TPU) and Microsoft will discuss its research into accelerating persistent neural networks in a data centre. It’s not clear if Google will talk about its latest TPU2 processor or give new performance data on the original version.
In a system architecture session, Cisco will describe its 400Gbps network processor which is rare because the company doesn’t usually reveal its internal ASIC designs. An ARM presentation will dig into its newly released DynamIQ cluster architecture, a more flexible follow-on to BigLittle that will be the backbone for future ARM SoCs.
The event ends with a traditional big iron session which this year will include the first detailed discussion of Qualcomm’s Centriq ARM server processor. The featured x86 match will pit talks on AMD’s Epyc server processor against Intel’s Skylake-SP. The session also includes a talk on the latest IBM mainframe processor. Missing will be anything on Oracle’s latest SPARC chips and Itanium, the server architecture Intel is no longer actively developing.
Kevin Krewell is a microprocessor veteran and a principal analyst at Tirias Research.
First published by EE Times U.S.