Silicon carbide can be employed to leverage its low dynamic and conduction losses and its high-temperature operation in switching applications in EV voltage rails.
EVs are packed with electronics requiring power. For high efficiency, switched-mode techniques are used to generate voltage rails, relying on semiconductors operating at high frequency. The ideal switch for the application has near-zero resistance when on, no leakage when off, and a high breakdown voltage. When it transitions between states, there should be little transient power dissipation, and any residual losses should result in minimal switch temperature rise. The search continues for the perfect switch.
IGBTs are favored at very high power for their low conduction losses, while MOSFETs dominate at low to medium power, where their fast switching minimizes associated component size and cost. MOSFETs traditionally use silicon technology, but now, silicon carbide (SiC) can be employed to leverage its low dynamic and conduction losses and its high-temperature operation. An even better approach is the SiC FET—a SiC JFET co-packaged with a low-voltage Si MOSFET in a cascode arrangement. The Si MOSFET provides for an easy, non-critical gate drive, while turning the normally on JFET into a normally off cascode.
The higher critical breakdown voltage of SiC in a MOSFET or JFET allows for a much thinner drift layer than in a silicon IGBT. Si IGBTs achieve low resistance by injecting a high number of carriers into the thicker drift layer, leading to a 100× stored charge, which has to be swept in and out of the drift layer in each switching cycle. This results in relatively high switching loss and significant gate-drive power requirements. SiC MOSFETs and JFETs are unipolar devices in which charge movement is just in and out of device capacitances, minimizing dynamic losses.
Electron mobility in the channel is much better with a SiC FET than with a SiC MOSFET, allowing a smaller die for the same resistance, with lower capacitance and faster switching or lower on-resistance for the same die area. This enables a higher die count per wafer for a given performance and consequent cost savings or a lower conduction loss for a given die area. The win-win of more dies per wafer with faster switching is tempered by the need to remove heat from a smaller area. SiC has 3× better thermal conductivity than Si and can operate at higher average and peak temperatures, but to enhance reliability, GEN 4 SiC FETs use wafer thinning to reduce the electrical and thermal resistance and a silver sinter die-attach for 6× better thermal conductivity than solder.
UnitedSiC has demonstrated the effectiveness of SiC FETs with a totem-pole PFC stage design working in continuous conduction mode with hard switching, which would be typical of the front end of an EV on-board charger. The converter is rated at 3.6kW with 85- to 264-VAC input and 390-VDC output using 18- or 60-mΩ GEN 4 SiC FETs in TO-247-4L packages, switching at 60kHz. System efficiency plots show a peak value of 99.37% achieved at 230VAC with one 18-mΩ SiC FET used for the high-frequency, high-and low-side switch positions. At full 3.6-kW output, the SiC FETs require minimal heatsinking.
This article was originally published on EE Times Europe.
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