Consider advanced logic design: high-tech specialization was supposed to provide some immunity to being considered a short-term employment prospect
The combination of improved design automation, round-the-clock design teams and old-fashioned cost-cutting are pushing engineers into the Gig Economy.
That reality runs counter to recent comments from Intel executives and RISC pioneers David Patterson and John Hennessy would assert we are in the midst of a “hundred flowers bloom” epoch for the design of high-integration digital logic, particularly as specialized processors are required for domains such as deep-learning AI and quantum computing. But anyone who expected a rerun of the hiring trends for microprocessor/microcontroller design in the 1990s will find that this new era is not unlike the return of industrial steel or coal to the U.S.: the sequel is a relatively jobless affair.
The shrinking design team is due in part to the steady improvement in EDA tools, allowing block-level simulation and place-and-route tools to reduce teams to a fraction of those necessary for 1990s-era wire-level design. It is also due to a strategy, favored by existing fabless semiconductor companies and startups alike, of employing design teams based in India or China, augmented by contract U.S. design engineers hired on a part-time basis to avoid benefits and stock options whenever possible — hence the emergence of the “gig chip design team.”
In a study released in late March, placement firm Challenger Gray & Christmas claimed that close to 20 percent of the entire U.S. workforce, or 44 million people, was gig-based, with gig percentages in many STEM fields higher than 20 percent. Most gig employees have few workplace rights and no human resources help, the firm said. Meanwhile, EE graduates in India are scrambling for positions with U.S.- or European-based companies, largely due to the failure of Prime Minister Narenda Modi’s “Make in India” initiative, which paradoxically led to unemployment rates in all engineering fields exceeding 7 percent by early 2019.
An examination of U.S Bureau of Labor Statistics numbers for opportunities in the U.S. could mislead the uninitiated to think that all is well in the hardware engineering world. For 2016, the most recent year with reliable data, some 324,000 U.S. engineers worked in electronic engineering categories that included hardware design, hardware support, and software engineering. BLS predicted that growth in AI processing and server multiprocessing would keep growth rates at 7 percent annually for the foreseeable future.
The toll taken
Yet anecdotal evidence suggests a much grimmer picture: Design engineering is becoming a “gray” profession, as a plurality of designers are 40 years or older, while younger EE graduates move into apps development. An earlier hollowing out of U.S.-based fabs has therefore been followed by a shift of design centers and fabless innovators to Asia. Even Europe seems to retain a bigger roster of EEs serving the likes of NXP, than is present in U.S.-based companies. While many engineering programs in academia are shifting degree focus to emerging fields such as quantum computing, few in STEM promotion appear to relish a comprehensive re-thinking of where the jobs in mid-century will reside.
Even the apparent bright spots come with critical caveats. The largest U.S tech companies that still retain a hardware business can cite hundreds of open requisitions. Apple and Qualcomm, for example, anticipate significant hiring since settling their legal battle in early April. Apple has more than 1,300 openings for software engineers, and slightly more than 1,000 openings for hardware engineers. But this number also reflects the trend of Apple becoming a primarily software-based company with a waning hardware business.
Qualcomm’s hiring, meanwhile, is limited to a few hundred new engineers, the number limited by both the failure of its planned merger with NXP, and because it continues to use a licensing model that limits chip production for its own sale.
Hence, even in the rosiest scenarios, the hardware engineering side of STEM looks shaky.
Part of the misperception results from the broad definition used for STEM — science, technology, engineering and math. USA Today, for example, recently offered a rosy outlook in an analysis of the 15 U.S. metropolitan areas in which STEM jobs were supposedly skyrocketing. Only one region, however — San Jose/Santa Clara — was dominated by hardware engineering, with three other cities attracting aerospace engineering with some EE content. The remainder were regions where biology, physical sciences, and chemical engineering jobs dominated. Many of these engineering fields could be transformed by increased task automation.
Meanwhile, chip- and board-level design serves as a harbinger of jobless expansion in STEM fields.
EDA, FPGAs shrink the modern design team
To a significant extent, the design team for high-integration single-chip logic, as well as for board-level subsystems, has been the victim of success in design abstraction. While the traditional ASIC no longer plays a significant role in distributed intelligence due to non-recurring engineering costs, the FPGA has taken over large sectors of specialized embedded processing, including graphics, network, and convolutional AI processing along with 32- and 64-bit microcontroller functions, and even some quantum computing tasks. The easy synthesis of ARM and RISC-V cores within a larger FPGA structure has made a fully characterized MPU a relic of the past.
Add to that the declining costs of block-level synthesis, correct-by-construction planning tools, and back-end verification software within EDA suites, and the engineering team numbering two dozen in the 1990s has been reduced in 2019 to one to three senior engineers and a handful of verification engineers performing backup tasks.
One headhunter in the AI processor field emphasized a “dirty little secret” common among startups and larger semiconductor companies alike: A company may only hire a single full-time designer for a significant project, and that designer may well be a remote hire in China or India in order to save salary and benefits costs. Then, domestic or international part-time designers will be hired on a gig basis to save on benefits. The headhunter, who asked not to be identified, said that this makes the team “80 percent virtual — and not always in a good way, from the perspective of the engineering employee.”
Talent also can be augmented from academic hobbyist communities working in Arduino and Raspberry Pi designs, he added.
There are of course exceptions to this rule, such as mixed-signal and sensor design skills applicable to Internet of things and vehicle-to-everything communications. Engineering schools around the world are as focused on those design skills as are U.S. universities. If such skills end up being overemphasized, those fields could well be oversupplied within a short number of years.
Changes to STEM Programs
To keep engineering relevant, STEM programs need to follow a path to greater abstraction already followed in software development. In the same way that coding classes evolved from assembly-level to Fortran to object-oriented languages, and then to Java and self-assembling app modules, electronic engineering will need to de-emphasize the chip floorplan in favor of the underlying algorithm. This change is already taking place as startups such as Kandou Bus emphasize signaling algorithms over core functionality in developing hard IP.
The challenge in moving up the value chain will be guaranteeing that basic device physics and a core level of fundamental Boolean logic theory is preserved. At the same time, the emphasis on abstracted education will leave behind individual logic elements, MSI and VLSI integration, and even multicore processing theory. Synthesizable cores will take care of most of these needs, though a logic engineer will need to retain a few low-level logic basics in the same way that a digital photographer must still understand an f-stop setting.
Either way, engineering education must still evolve from a focus on the processing elements within a single-chip suite to study the algorithms that drive the hardware design.
This implies that every hardware engineer will need a grounding in mathematics (including advanced DSP theory) and in basic CS/EE principles. If one wants to design a “deep-learning unit” with three hidden layers of convolutional neural processing, for example, the engineer does not need to explicitly determine how many graphic processing subunits and neural processors will provide the optimal single-board processor. Rather, a detailed definition of the algorithms providing the desired results will drive the design, and EDA tools will take care of the details.
For embedded platforms in IoT applications, a core sensor and mixed-signal processing environment must be retained. But the same basic principle holds. And projects like Arduino have helped automate the embedded-control side of this equation.
Even with a more abstracted EE learning environment, however, educators must recognize that fewer design engineers will be required for such tasks. Hence, the focus should shift to the mix of hardware engineering and computer science graduates needed in a labor market where skill requirements could change on a monthly basis.
Then there are issues related to job satisfaction, employee retention, and how long a typical tech startup or established company can sustain itself employing engineers with six-figure salaries? In application programming environments, the rise of “app mills” in the South of Market Street section of San Francisco, where recent graduates in programming literally live in dormitories, coding apps for virtual intern-style wages, suggests a similar future that could be in store for the next wave of EE graduates: Even if they move up the abstraction ladder to algorithms, will there be sufficient value-added to justify an engineer’s living wage and perhaps a decent bottle of wine on the weekend?
The hollowing out of U.S. manufacturing in recent decades suggests that a prosperous work environment for the hardware engineer remains far from guaranteed.
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