Exclusive CEO Interview: Latest Funding Drives Ventana’s First RISC-V Chiplets in Data Centers

Article By : Nitin Dahad

Balaji Baktha discusses how $55 million gathered from investors will help Ventana Micro Systems meet data center, automotive, and 5G demands with RISC-V–based chiplets.

Ever since Ventana Micro Systems came out of stealth last year, the company has been busily developing relationships with partners and potential customers to create traction for its RISC-V–based chiplets, which it believes will address the high-performance computing demands in data centers and at the edge.

Now, the company has raised $55 million in new funding to productize its chiplets based on open standard die–to–die (D2D) interfaces.

The excitement and enthusiasm Balaji Baktha, founder and CEO of Ventana, has for chiplets solving the computing challenges created by the demands in data center, automotive, and 5G is very apparent. EE Times heard it firsthand, in an exclusive interview with the CEO at the recent 59th Design Automation Conference (DAC) in San Francisco.

At DAC, he said he believed this was being reflected in the market, too—especially around open source and RISC–V, the latter being something Intel Foundry Services (IFS) has been pushing a lot (see “DAC 2022: Digital twins and the door to the metaverse”).

“DAC was all about how you enable the next wave of compute density,” he said. “It was about chiplets, about open compute and open hardware, and RISC–V. With UCIe (Universal Chiplet Interconnect Express) now beginning to take shape, Ventana is working closely and strategically with Intel to bring UCIe–based chiplets to market. The latest funding will allow us to get there, and we expect tape out of our first UCIe chiplet products in the second half of 2023.”

The UCIe is an open specification that aims to define the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level (see Chiplets Get a Formal Standard with UCIe 1.0). The founding members of the UCIe consortium include AMD, Arm, Advanced Semiconductor Engineering, Inc. (ASE), Google Cloud, Intel Corporation, Meta, Microsoft, Qualcomm, Samsung, and TSMC. Alibaba and Nvidia joined the consortium this month.

“We will be one of the first in the market to productize chiplets for UCIe, and we are working closely with Intel to make these available,” Baktha said.

Supporting this vision, Bob Brennan, VP of customer solutions engineering at IFS, said, “RISC–V offers a level of scalability and customization that is unique in the industry. We are seeing strong demand from our customers to support high–performance RISC–V solutions.”

A chiplet-based SoC enables each chiplet to be implemented in its optimal process node, and provides scalable computing, workload acceleration, and I/O. (Source: Ventana Micro Systems)

On the chiplet progress, he added, “Ventana has the most complete and well developed open chiplet–based platform, which is well aligned to Intel’s vision. Ventana’s chiplets enable IFS to deliver modular solutions that increase performance, reduce power, reduce development cost and accelerate time to market.”


What kind of traction is Ventana receiving? And what was it that convinced investors to put another $55 million into the company?

Ventana brought in new investors that opened the door to key markets in Asia, particularly to Taiwan, Korea, and Japan, Baktha said, declining to name the of four new investors.

In terms of market take up, he explained the level of excitement for Ventana’s solution is very strong in hyperscalers, particularly in China, but also in the U.S. Meanwhile in Europe, there is significant interest for RISC–V chiplets in high–performance computing.

“China is driving our growth based on the appetite for RISC–V, and especially since they are looking for server–class product,” he said. “In China, it’s all about data centers, and we are working with all the key hyperscaler companies there, with all of them interested in RISC–V chiplets. One large cloud provider will definitely be going with RISC–V based on what they have seen, and we are working with a hyperscaler in China on infrastructure solutions, where they are looking to deploy RISC–V in servers.”

In the U.S., Baktha said the first big deployment success will be in data center infrastructure in the second half of 2023.

It’s not just the data center that Ventana is seeing interest from. Baktha said that one automotive manufacturer is “deeply engaged” with the company to develop a next–generation ADAS (advanced driving assistance system) processor.

“They recognize that RISC–V will increase their differentiation, so they are working with us on the deep microarchitecture,” he said. “We see similar interest from a large player in the Far East.”

In other areas, Ventana has made serious inroads into key 5G Open RAN players who are looking at transitioning their chipsets [to RISC–V], as well as client devices, such as Chromebooks, he added.

In summary, Ventana has been keen to demonstrate that it’s focus on RISC-V–based chiplets will be key in addressing some of the HPC challenges faced in data centers, automotive, and 5G. As Patrick Moorhead, CEO and chief analyst at Moor Insights & Strategy, said earlier this year, “Chiplets are where the semiconductor industry is headed as they provide high performance, unlimited flexibility, and time–to–market advantages.”

This article was originally published on EE Times.

Nitin Dahad is a correspondent for EE Times, EE Times Europe and also Editor-in-Chief of embedded.com. With 35 years in the electronics industry, he’s had many different roles: from engineer to journalist, and from entrepreneur to startup mentor and government advisor. He was part of the startup team that launched 32-bit microprocessor company ARC International in the US in the late 1990s and took it public, and co-founder of The Chilli, which influenced much of the tech startup scene in the early 2000s. He’s also worked with many of the big names – including National Semiconductor, GEC Plessey Semiconductors, Dialog Semiconductor and Marconi Instruments.


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